Pipeline run

022f1ff1-5cc3-43e9-af91-5dbeb7548526

Pipeline LLM cost (USD)

API 1: $0.0087 API 2: $0.0016 API 3: $0.0000 Total: $0.0103

Client output enrichment

v2 Skill cluster · Nature of work · AI index · Tech stack maturity · Evidence · KRA description

Nature of work · Verification Engineering

Lead a verification team to build testbench architecture, plans, and flows for full-chip/subsystem verification, then run and sign off unit to chip-level tests using SystemVerilog/UVM, simulators, assertions, and regression management.

"Drive the test bench architecture, verification plan and test bench development for full chip and subsystem verification."

Tech stack maturity

Mainstream Modern

AI index (0 = no AI use, 5 = totally AI-dependent · v2.1)

0.50 / 5

· Title match

✓ Has AI skill

· AI skill (primary)

✓ AI skill (secondary)

· On AI team

· Builds AI products

vocab breakdown (legacy)

Assistants (×1): Jasper

Frameworks (×2): —

Models / concepts (×3): —

Evidence — skills matched in JD (27)

ASIC SystemVerilog VMM OVM UVM Synopsys VCS Cadence IES Assertion-Based Verification Metric-Driven Verification Regression Management AXI DDR4 HBM PCIe Python Perl FPGA Coherency Computer Architecture Cadence IEV Jasper Synopsys Magellan Gate-Level Simulation Power Verification Reset Verification +2

Skill cluster (2 dimension groups, role-scoped)

Python Programming

Python

Cross-cutting / unaligned

ASIC SystemVerilog VMM OVM UVM Synopsys VCS Cadence IES Assertion-Based Verification Metric-Driven Verification Regression Management AXI DDR4 HBM PCIe Perl FPGA Coherency Computer Architecture Cadence IEV Jasper Synopsys Magellan Gate-Level Simulation Power Verification Reset Verification Contention Checking Abstraction Techniques

Show KRA description ↓

Build and lead the verification team. Drive the test bench architecture, verification plan and test bench development for full chip and subsystem verification. Mentor and lead a team of verification engineers to complete unit, subsystem and chip level verification. Develop and maintain methodology, flows, and sign-off criteria for verification. Experience with development of test bench architecture, test plan and test bench development for full chip and subsystem verification Hands on experience with System Verilog and VMM/OVM/UVM Hands-on experience with simulation tools including Synopsys VCS, Cadence IES to verify full-chip SoCs and FPGA based designs Requires strong understanding of state-of-the-art verification techniques, including assertion and metric-driven verification. Experience in AXI, DDR4, HBM, PCIe verification is a plus Verification experience in hardware accelerators and coprocessors is a plus Familiarity with verification management tools including regression management is required Familiarity with scripting in Python or Perl Strong understanding of ASIC and/or full custom chip development process is required Experience with FPGA programming and software is a plus Coherency and computer architecture experience is desirable Experience with formal property checking tools such as Cadence (IEV), Jasper, and Synopsys (Magellan) is a plus. Experience with gate level simulation, power verification, reset verification, contention checking, abstraction techniques are a plus

Signals

Skill —

—

Alias —

—

KRA ml-ops-engineer

0.43

Post-classification

Centroidupdated · n=1

Alias collision log—

New-role queue—

New skills captured25

New KRA capturedyes

Captured for admin review

ASIC primary ↔ FPGA / ASIC Engineer pending

SystemVerilog primary ↔ FPGA / ASIC Engineer pending

VMM primary ↔ FPGA / ASIC Engineer pending

OVM primary ↔ FPGA / ASIC Engineer pending

UVM primary ↔ FPGA / ASIC Engineer pending

Synopsys VCS primary ↔ FPGA / ASIC Engineer pending

Cadence IES primary ↔ FPGA / ASIC Engineer pending

Assertion-Based Verification primary ↔ FPGA / ASIC Engineer pending

Metric-Driven Verification primary ↔ FPGA / ASIC Engineer pending

AXI ↔ FPGA / ASIC Engineer pending

DDR4 ↔ FPGA / ASIC Engineer pending

HBM ↔ FPGA / ASIC Engineer pending

PCIe ↔ FPGA / ASIC Engineer pending

Regression Management primary ↔ FPGA / ASIC Engineer pending

FPGA ↔ FPGA / ASIC Engineer pending

Coherency ↔ FPGA / ASIC Engineer pending

Computer Architecture ↔ FPGA / ASIC Engineer pending

Cadence IEV ↔ FPGA / ASIC Engineer pending

Jasper ↔ FPGA / ASIC Engineer pending

Synopsys Magellan ↔ FPGA / ASIC Engineer pending

Gate-Level Simulation ↔ FPGA / ASIC Engineer pending

Power Verification ↔ FPGA / ASIC Engineer pending

Reset Verification ↔ FPGA / ASIC Engineer pending

Contention Checking ↔ FPGA / ASIC Engineer pending

Abstraction Techniques ↔ FPGA / ASIC Engineer pending

R&R fragment (sim 0.00) ↔ FPGA / ASIC Engineer pending

Status: completed Created: 2026-05-27T14:51:43.266817Z Updated: 2026-06-12T17:10:07.053534Z API 3 duration: 5547 ms

Flow Current 3-step pipeline

1 POST /skills/extract-from-jd

2 POST /skills/extract-details

3 POST /skills/final-role-output

Role Chosen role & resolution

FPGA / ASIC Engineer

domain · Hardware Engineering CASE DOMAIN

slug: fpga-asic-engineer · id: 216 · source: db

Domain=Hardware Engineering; The JD is explicitly about ASIC verification leadership, test bench architecture, UVM-based verification, and SoC/full-chip verification, which matches the FPGA/ASIC Engineer role best.

Matched skills

System VerilogVMMOVMUVMSynopsys VCSCadence IESAXIDDR4HBMPCIePythonPerlCadence (IEV)JasperSynopsys (Magellan)

Matched dimensions

ASIC Verification LeadershipTest Bench Architecture and DevelopmentFull-Chip and Subsystem VerificationVerification Methodology and Sign-offSimulation and Formal VerificationRegression ManagementHardware Architecture Verification

Matched KRAs

Build and lead the verification teamDrive the test bench architectureDevelop verification plan and test bench developmentLead unit, subsystem and chip level verificationDevelop and maintain methodology, flows, and sign-off criteria

Resolution: in_db — role exists in library; skill↔dim and role↔dim links saved when applicable.

New skills

Skill↔dim saved

Role↔dim saved

Skipped

Job description

Career Opportunities

ASIC Verification Manager (MID TO SENIOR POSITION)

Roles and Responsibilities

Bachelor's degree in Electrical/Computer Engineering or Computer Science and 7+ years OR a Master's degree in Electrical/Computer Engineering or Computer Science and 5+ years of experience in Verification of ASIC, custom IC designs, and/or FPGA designBuild and lead the verification team.

Drive the test bench architecture, verification plan and test bench development for full chip and subsystem verification.

Mentor and lead a team of verification engineers to complete unit, subsystem and chip level verification.

Develop and maintain methodology, flows, and sign-off criteria for verification.

The Ideal Candidate

Experience with development of test bench architecture, test plan and test bench development for full chip and subsystem verification

Hands on experience with System Verilog and VMM/OVM/UVM

Hands-on experience with simulation tools including Synopsys VCS, Cadence IES to verify full-chip SoCs and FPGA based designs

Requires strong understanding of state-of-the-art verification techniques, including assertion and metric-driven verification.

Experience in AXI, DDR4, HBM, PCIe verification is a plus

Verification experience in hardware accelerators and coprocessors is a plus

Familiarity with verification management tools including regression management is required

Familiarity with scripting in Python or Perl

Strong understanding of ASIC and/or full custom chip development process is required

Experience with FPGA programming and software is a plus

Coherency and computer architecture experience is desirable

Experience with formal property checking tools such as Cadence (IEV), Jasper, and Synopsys (Magellan) is a plus.

Experience with gate level simulation, power verification, reset verification, contention checking, abstraction techniques are a plus

Email: careers@goodbits.in

Senior DevOps Engineer

Experience: 4 years

Experience with Linux administration. Must be very comfortable with Linux (Must have)

Experience with building and deploying applications on AWS. (Must have)

Must be well versed in creating CI/CD pipelines, and building docker containers. (Must have)

Deep experience with CI/CD tools (Jenkins) & pipelines. (Must have)

Should Have basic understanding of networking (must have)

Understanding concept of code versioning tools such as Git or SVN.

Understanding and implementation of security and data protection.

Should have good communication skills (must have)

Experience with any scripting languages-python/bash preferably

Experience in IAAC tools like Ansible, Terraform is a plus

Knowledge in container orchestration tools like EKS, ECS is a plus

Email: careers@goodbits.in

Dotnet Backend Developer

Looking for Dotnet Backend Developer with 3+ yrs. experience (relevant)

Skills
Solid hands on experience on Microsoft .Net technology stack (.NET Core, MVC, Web API & C#), Microsoft Azure , Micro service Designing and implementing solutions on Azure Cloud Platform (ServicesAzure PaaS Service SDKs for .NET, like Storage, App Insights, Azure App Services, Azure Server-less, Micro services on Azure, API Management, Event Hub, Logic Apps, Service Bus & Message Queues, Azure Storage, Key Vaults) Working knowledge of SQL Server databases, queuing technologies, relational databases, SQL functions, queries. Entity Framework 6/LINQ Software development background including design patterns, data structures, test driven development Ability to use version control software such as GIT and TFS
Email: careers@goodbits.in

Dotnet Full Stack Developer

Looking for Dotnet Full Stack Developer with 3+ yrs. experience (relevant)
Solid hands on experience on Microsoft .Net technology stack (.NET Core, MVC, Web API & C#), Microsoft Azure , Micro service. Experience in any of Frontend Technologies - Angular / React JS. Designing and implementing solutions on Azure Cloud Platform (ServicesAzure PaaS Service SDKs for .NET, like Storage, App Insights, Azure App Services, Azure Server-less, Micro services on Azure, API Management, Event Hub, Logic Apps, Service Bus & Message Queues, Azure Storage, Key Vaults) Working knowledge of SQL Server databases, queuing technologies, relational databases, SQL functions, queries. Entity Framework 6/LINQ Software development background including design patterns, data structures, test driven development Ability to use version control software such as GIT and TFS
Email: careers@goodbits.in

React Native Developer

Looking for React Native Developer with 3+ yrs. experience (relevant)

Job Description

We are looking for React Native developer interested in building mobile apps. The candidate should be able to build high-quality, and performant applications with good coding standards and according to design. The developer must be skilled in development, writing clean and scalable code, and documenting functionality.

Candidate Requirements
Experience with React Native skills such as Redux/Mobx, GraphQL, Animation, Authentication, etc. Must have built Mobile apps that are deployed to App store and google play store. Hands-on experience in using Hooks for functional components with the State, Pure Components, etc. Familiarity with native build tools, like XCode, Gradle Android Studio, IntelliJ Experience with automated testing suites, like Jest or Mocha Should have the ability to integrate third-party libraries and APIs. Familiarity with code versioning tools such as Git. Good knowledge of React Native and its core Principles.
Key Skills: React Native, Mobile Application Development, IOS Development, JavaScript

Android Development, React JS

Email: careers@goodbits.in

QA Tester

Job Summary

The Sr. Software Engineer – Automation Testing, Digital and Transformation requires in-depth knowledge and expertise to participate in the product planning, designing test suites, defining automation testing strategies and execution of testing across different products. Core part of Software engineering team, responsible for end-to-end product quality and automating as much as testing efforts with respect to functional, User Interface, Load and Performance Test.

Essential Duties And Responsibilities
Possesses solid understanding of the overall vision, product road maps, business needs and the solution architecture across different products. Uses this in-depth knowledge to solve complex problems. Plans and manages end-to-end testing in an Agile methodology with Azure DevOps / Visual Studio Team Services (VSTS). Sets up Continuous Integration (CI) and Continuous Delivery (CD) using Azure DevOps for all Automated Test Tools. Develops test case, prioritizes test cases and configures test automation framework and executes functional stability and performance tests. Responsible for defining and executing testing throughout the product development lifecycle and sharing testing status reports across engineering team. Defines and executes Manual Test cases during early stage of product development using Azure DevOps Test Plan and Test Suites. Enables Manual Testing as minimum and driving product testing in a repeatable automated manner. Manages Automation Testing Framework across Web Platform, Mobility Platform and API Level. Coordinates with product owner and software engineering team to deliver stable enterprise software products with high quality. Possesses clear understanding of Automation Testing, Test Coverages, Code Coverages for Unit Testing, Test Execution State Analysis. Works to build business knowledge and to transform this knowledge and business requirements into test specifications. Estimates technical requirements and breaks down work to user stories and tasks for automation testing Plans, tests, deploys and monitors cloud-based solution in a DevOps model. Collaborates with senior roles and Architects on various prototypes, or proof of concept, to test solutions Azure Automation, Azure Monitor, Log Analytics services, Identify crash log for mobile based solutions. Monitors and troubleshoots Azure hosted solution. Other duties as assigned.
Education And Experience
Bachelor’s degree or equivalent experience Minimum 5+ years of experience
Knowledge, Skills And Abilities
Experience with authoring functional and non-functional test cases. Exceptional knowledge on capturing NFR’s Hands-on experience and in-depth knowledge in the following: Automation testing using HP ALM Having strong knowledge in creating test plans, test execution using Azure Test Plan Suites with the power of Azure DevOps Strong knowledge of C# / Python programming language and Azure cloud technologies Deep Understanding of Azure DevOps / VSTS for Build, Automation and overall Testing Strategies Familiar with of TestNG/Junit, Ant/Maven and Jenkins build and release pipelines Experience is Native Mobile App Testing using Automation, Familiar with HockeyApp Crash Analytics, and Visual Studio App Center Exceptional knowledge in log analysis from Azure Application Insights, and Kudu logs. Exceptional knowledge on Selenium/Appium and BDD Tools Experience in designing, building test automation frameworks for REST API’s and UI based testing Solid knowledge of DevOps and integration of test automation into CI/CD Pipeline, Release Build Plan Performance Testing and web load testing using Microsoft Web Load Test and Performance Test Tools. Integrate All Test Execution with Release pipeline Experiences in Load Test using Visual Studio and Azure DevOps Performance Testing using Azure DevOps Suites, identify performance test metrics and provide recommendation. Advanced knowledge of PS1 script. Familiar with Developing & managing cloud-based solution with Azure PaaS, using C#, .NET Core, Node.js and python Application Telemetry and analyze telemetry using Application Insights and other analytics services Solid understanding and knowledge of the following:Overall automation testing strategies and road maps using Azure DevOpsEnd-to-End Integration of different automation testing tools using Build and Release pipelinesManaging Traceability matrix throughout product development lifecycle. Preferred:Overall 4+ years of experiences in Automation Testing (3+ years with Selenium / C# / Azure DevOps)Development experiences with .NET, C#, http://ASP.NET MVC with other Microsoft Tools and Technologies Ability to work in a global and virtual environment and to effectively prioritize and execute tasks in a high-pressure environment. Ability to work in a fast-paced environment; utilize sound judgment with an ability to manage multiple priorities with a sense of urgency. Willingness to global travel Able to be aware of all relevant SOPs as per Company policy as they are related to the position covered by this Job Description Able to comply with the company’s safety and quality policies at all times
Physical and Travel Requirements
10% travel, including global travel Occasional on-call work required Prefer 12pm – 8pm India time. Willingness to work outside of these hours as needed.
Email: careers@goodbits.in

SENIOR FULL STACK ENIGNEER - NODEJS/REACTJS

Looking for candidates with good experience to join our Engineering Team. The selected candidate will assist in conceptualising, planning, and creating groundbreaking

new features that will enhance our user’s online experience.

Qualifications
4+ Years of overall experience 2+ years of relevant experience in Nodejs & React jsGood to have Team lead experience Exceptional coding skills in Javascript/Jquery, MySQL, MongoDB Knowledge in Frameworks/libraries like Flux, Redux, Express.js etc. Familiarity with Architectural patterns like MVC, MVVM, and MVP. Familiarity with Linux platforms and Shell scripting is an added bonus Strong communication skills
Responsibilities
Building and integrating information systems to meet the company’s needs. Optimize and develop new features for our backend. Scale and optimize code to handle fast-growing traffic. Resolving technical problems as they arise. Continually researching current and emerging technologies and proposing changes where needed. Interacting with the Client
Email: careers@goodbits.in

Python Developer

Years of Experience : 3+Yrs

Location : Kochi, Infopark

Must Have
Strong Data Structure Skills. Desired Python-Django developers must have skills in python, Django, and Django Rest API. Basic idea of Kubernetes / Docker (Worked in a SaaS / Container Env)
Good To Have
Strong Problem Solving / Algorithmic Skills Understanding of OS Concepts like Multi-threading / Multi-Process, Concurrency, Synchronization Primitives, Memory Management Worked with NoSQL Databases like Mongo, Elastic, Cassandra Network Security Domain Experience is a Plus (not mandatory) Ideal candidate would have the above skills and also need to know any JavaScript library like React JS, Vue JS, Angular JS, etc. Proficient in one or more of the well-known Programming Languages like Python, NodeJS (Proficiency in other programming languages is also fine, but, must be ready to code in Python / NodeJS/ GoLang)
Forward suitable profiles to careers@goodbits.in

NB: In case you receive any fraudulent communication for a Job offer/ interview call against payment of money, please stay alert. Goodbits Tech Pvt Ltd doesn't collect any placement fee from any candidates for any of the above

Email: careers@goodbits.in

Front End Developer – ReactJS

Qualifications
overall 3+ Years of experience3+ years of experience in Reactjs.Proficiency in Node/Python / Dotnet will be a big plusGreat Communication skills
Skillset
Strong proficiency in JavaScript, including DOM manipulation and the JavaScript object model Thorough understanding of React.js and its core principles (especially React Hooks 16.8 and higher versions) Prior experience with popular React.js workflows (such as Flux or Redux) Familiarity with more current specifications of EcmaScript. Familiarity with RESTful APIs (GraphQL is a plus). Strong proficiency in HTML5, CCS3, SASS, and familiarity with any popular CSS utility frameworks such as Material-UI, Bootstrap, Ant-d, Tailwind, etc Knowledge of modern authorization mechanisms, such as JSON Web Token. Knowledge of tools and libraries like React Hook Form, Immer, Formik, Lodash, React Router, React Router DOM, etc. Familiarity with modern front-end build pipelines and tools is a plus. Experience with common front-end development tools such as Babel, ESLint, Airbnb style guide, Webpack, NPM, YARN, etc. Familiarity with code versioning tools (git) and any of the git clients such as Source Tree, Github desktop, TortoiseGit, SmartGit, etc Ability to understand business requirements and translate them into technical requirements A knack for benchmarking and code optimization
Email: careers@goodbits.in

Skills from this JD

Each row merges API 1 extraction, API 2 library match / v3 orchestration (dimensions + locked dims), and API 3 persistence tags.

ASIC Primary New / orchestrated API 3: new canonical path (new) New / unmatched skill (orchestrated in API 2)

Skill enrichment (orchestrator / LLM)

No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).

Derived legacy fields

Category: Other
Sub-category: general
Skill nature: TOOL
Volatility: MEDIUM
Typical lifespan: MULTI_YEAR
Version strategy: UNVERSIONED

SystemVerilog Primary New / orchestrated API 3: new canonical path (new) New / unmatched skill (orchestrated in API 2)

Skill enrichment (orchestrator / LLM)

No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).

Derived legacy fields

Category: Other
Sub-category: general
Skill nature: TOOL
Volatility: MEDIUM
Typical lifespan: MULTI_YEAR
Version strategy: UNVERSIONED

VMM Primary New / orchestrated API 3: new canonical path (new) New / unmatched skill (orchestrated in API 2)

Skill enrichment (orchestrator / LLM)

No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).

Derived legacy fields

Category: Other
Sub-category: general
Skill nature: TOOL
Volatility: MEDIUM
Typical lifespan: MULTI_YEAR
Version strategy: UNVERSIONED

OVM Primary New / orchestrated API 3: new canonical path (new) New / unmatched skill (orchestrated in API 2)

Skill enrichment (orchestrator / LLM)

No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).

Derived legacy fields

Category: Other
Sub-category: general
Skill nature: TOOL
Volatility: MEDIUM
Typical lifespan: MULTI_YEAR
Version strategy: UNVERSIONED

UVM Primary New / orchestrated API 3: new canonical path (new) New / unmatched skill (orchestrated in API 2)

Skill enrichment (orchestrator / LLM)

No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).

Derived legacy fields

Category: Other
Sub-category: general
Skill nature: TOOL
Volatility: MEDIUM
Typical lifespan: MULTI_YEAR
Version strategy: UNVERSIONED

Synopsys VCS Primary New / orchestrated API 3: new canonical path (new) New / unmatched skill (orchestrated in API 2)

Skill enrichment (orchestrator / LLM)

No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).

Derived legacy fields

Category: Other
Sub-category: general
Skill nature: TOOL
Volatility: MEDIUM
Typical lifespan: MULTI_YEAR
Version strategy: UNVERSIONED

Cadence IES Primary New / orchestrated API 3: new canonical path (new) New / unmatched skill (orchestrated in API 2)

Skill enrichment (orchestrator / LLM)

No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).

Derived legacy fields

Category: Other
Sub-category: general
Skill nature: TOOL
Volatility: MEDIUM
Typical lifespan: MULTI_YEAR
Version strategy: UNVERSIONED

Assertion-Based Verification Primary New / orchestrated API 3: new canonical path (new) New / unmatched skill (orchestrated in API 2)

Skill enrichment (orchestrator / LLM)

No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).

Derived legacy fields

Category: Other
Sub-category: general
Skill nature: TOOL
Volatility: MEDIUM
Typical lifespan: MULTI_YEAR
Version strategy: UNVERSIONED

Metric-Driven Verification Primary New / orchestrated API 3: new canonical path (new) New / unmatched skill (orchestrated in API 2)

Skill enrichment (orchestrator / LLM)

No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).

Derived legacy fields

Category: Other
Sub-category: general
Skill nature: TOOL
Volatility: MEDIUM
Typical lifespan: MULTI_YEAR
Version strategy: UNVERSIONED

AXI Secondary New / orchestrated API 3: new canonical path (new) New / unmatched skill (orchestrated in API 2)

Skill enrichment (orchestrator / LLM)

No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).

Derived legacy fields

Category: Other
Sub-category: general
Skill nature: TOOL
Volatility: MEDIUM
Typical lifespan: MULTI_YEAR
Version strategy: UNVERSIONED

DDR4 Secondary New / orchestrated API 3: new canonical path (new) New / unmatched skill (orchestrated in API 2)

Skill enrichment (orchestrator / LLM)

No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).

Derived legacy fields

Category: Other
Sub-category: general
Skill nature: TOOL
Volatility: MEDIUM
Typical lifespan: MULTI_YEAR
Version strategy: UNVERSIONED

HBM Secondary New / orchestrated API 3: new canonical path (new) New / unmatched skill (orchestrated in API 2)

Skill enrichment (orchestrator / LLM)

No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).

Derived legacy fields

Category: Other
Sub-category: general
Skill nature: TOOL
Volatility: MEDIUM
Typical lifespan: MULTI_YEAR
Version strategy: UNVERSIONED

PCIe Secondary New / orchestrated API 3: new canonical path (new) New / unmatched skill (orchestrated in API 2)

Skill enrichment (orchestrator / LLM)

No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).

Derived legacy fields

Category: Other
Sub-category: general
Skill nature: TOOL
Volatility: MEDIUM
Typical lifespan: MULTI_YEAR
Version strategy: UNVERSIONED

Regression Management Primary New / orchestrated API 3: new canonical path (new) New / unmatched skill (orchestrated in API 2)

Skill enrichment (orchestrator / LLM)

No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).

Derived legacy fields

Category: Other
Sub-category: general
Skill nature: TOOL
Volatility: MEDIUM
Typical lifespan: MULTI_YEAR
Version strategy: UNVERSIONED

Python Secondary Library skill API 3: existing canonical (in_db) Existing skill (matched library)

Canonical: Python id=5 · python

Aliases — catalog

Python (CANONICAL) primary
Python 2 (VERSION)
Python 2.x (VERSION)
Python 3 (VERSION)
Python 3.10 (VERSION)
Python 3.11 (VERSION)
Python 3.12 (VERSION)
Python 3.x (VERSION)
py (VERSION)
py2 (VERSION)
py3 (VERSION)
python 3 (VERSION)
python 3.x (VERSION)
python2 (VERSION)
python3 (VERSION)
python3.x (VERSION)

Context tags (catalog)

API Django FastAPI Flask Jupyter NumPy PEP 8 Pandas REST SQLAlchemy asyncio pandas pip pytest type hints venv virtualenv

Stored enrichment (catalog DB)

Category: Language
Sub-category: Programming Language
Vendor: PSF
License: mit
Year introduced: 1991
Confidence: 0.99
Version strategy: SEPARATE_ENTITY
Version tag: 3

Maturity reasoning: Python appears in a very high volume of job descriptions across data, backend, automation, and ML roles, and remains a default hiring-pipeline language on major job boards and tech stacks.

Skill profile (library / DB)

Skill nature: LANGUAGE
Volatility: STABLE
Typical lifespan: EVERGREEN
Category id: 6
Sub-category id: 96
Extractable: True
Also category: False

Dimensions (API 2 worklist)

Cloud Security Scripting & DSL Languages Catalog dimension db id 248

Library dimension (catalog)

Roles linked in library: Cloud Security Engineer
Programming Languages Catalog dimension db id 1

Library dimension (catalog)

Roles linked in library: Backend Developer, Fullstack Developer, Fullstack Developer
Programming Languages and Scripting Catalog dimension db id 59

Library dimension (catalog)

Roles linked in library: Cyber Security Engineer
Programming Languages for Data Work Catalog dimension db id 21

Library dimension (catalog)

Roles linked in library: Data Engineer
Programming Languages for ML Systems Catalog dimension db id 39

Library dimension (catalog)

Roles linked in library: ML Engineer, MLOps Engineer
Programming Languages for XR Catalog dimension db id 97

Library dimension (catalog)

Roles linked in library: AR/VR Engineer
Python Programming Catalog dimension db id 290

Library dimension (catalog)

Roles linked in library: Python Backend Developer

API 3 link attempts (this skill)

Dimension	Skill↔dim	Role↔dim	Outcome
Cloud Security Scripting & DSL Languages cloud-security-scripting-dsl-languages	✓	—	Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role)
Programming Languages programming-languages	✓	—	Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role)
Programming Languages and Scripting programming-languages-and-scripting	✓	—	Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role)
Programming Languages for Data Work programming-languages-for-data-work	✓	—	Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role)
Programming Languages for ML Systems programming-languages-for-ml-systems	✓	—	Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role)
Programming Languages for XR programming-languages-for-xr	✓	—	Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role)
Python Programming python-programming	✓	—	Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role)

Perl Secondary Library skill API 3: existing canonical (in_db) Existing skill (matched library)

Canonical: Perl id=1001 · perl

Aliases — catalog

Perl (CANONICAL)

Context tags (catalog)

BioPerl CPAN Catalyst DBI Dancer Mojolicious Moose Object-Oriented Perl6 Perlbrew Plack Regex Template Toolkit Test::More Tidy

Stored enrichment (catalog DB)

Category: Language
Sub-category: Scripting Language
Vendor: Perl Foundation
License: unknown
Year introduced: 1987
Confidence: 0.99
Version strategy: NOT_APPLICABLE

Maturity reasoning: Perl still appears in some legacy-maintenance JDs, but far fewer than Python/JavaScript; GitHub activity and new-project adoption are much lower, with many orgs having migrated to Python or Ruby.

Skill profile (library / DB)

Skill nature: LANGUAGE
Volatility: STABLE
Typical lifespan: EVERGREEN
Category id: 6
Sub-category id: 38
Extractable: True
Also category: False

Dimensions (API 2 worklist)

React Frontend Development Catalog dimension db id 96

Library dimension (catalog)

API 3 link attempts (this skill)

Dimension	Skill↔dim	Role↔dim	Outcome
React Frontend Development d_init_01	✓	—	Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role)

FPGA Secondary New / orchestrated API 3: new canonical path (new) New / unmatched skill (orchestrated in API 2)

Skill enrichment (orchestrator / LLM)

No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).

Derived legacy fields

Category: Other
Sub-category: general
Skill nature: TOOL
Volatility: MEDIUM
Typical lifespan: MULTI_YEAR
Version strategy: UNVERSIONED

Coherency Secondary New / orchestrated API 3: new canonical path (new) New / unmatched skill (orchestrated in API 2)

Skill enrichment (orchestrator / LLM)

No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).

Derived legacy fields

Category: Other
Sub-category: general
Skill nature: TOOL
Volatility: MEDIUM
Typical lifespan: MULTI_YEAR
Version strategy: UNVERSIONED

Computer Architecture Secondary New / orchestrated API 3: new canonical path (new) New / unmatched skill (orchestrated in API 2)

Skill enrichment (orchestrator / LLM)

No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).

Derived legacy fields

Category: Other
Sub-category: general
Skill nature: TOOL
Volatility: MEDIUM
Typical lifespan: MULTI_YEAR
Version strategy: UNVERSIONED

Cadence IEV Secondary New / orchestrated API 3: new canonical path (new) New / unmatched skill (orchestrated in API 2)

Skill enrichment (orchestrator / LLM)

No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).

Derived legacy fields

Category: Other
Sub-category: general
Skill nature: TOOL
Volatility: MEDIUM
Typical lifespan: MULTI_YEAR
Version strategy: UNVERSIONED

Jasper Secondary New / orchestrated API 3: new canonical path (new) New / unmatched skill (orchestrated in API 2)

Skill enrichment (orchestrator / LLM)

No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).

Derived legacy fields

Category: Other
Sub-category: general
Skill nature: TOOL
Volatility: MEDIUM
Typical lifespan: MULTI_YEAR
Version strategy: UNVERSIONED

Synopsys Magellan Secondary New / orchestrated API 3: new canonical path (new) New / unmatched skill (orchestrated in API 2)

Skill enrichment (orchestrator / LLM)

No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).

Derived legacy fields

Category: Other
Sub-category: general
Skill nature: TOOL
Volatility: MEDIUM
Typical lifespan: MULTI_YEAR
Version strategy: UNVERSIONED

Gate-Level Simulation Secondary New / orchestrated API 3: new canonical path (new) New / unmatched skill (orchestrated in API 2)

Skill enrichment (orchestrator / LLM)

No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).

Derived legacy fields

Category: Other
Sub-category: general
Skill nature: TOOL
Volatility: MEDIUM
Typical lifespan: MULTI_YEAR
Version strategy: UNVERSIONED

Power Verification Secondary New / orchestrated API 3: new canonical path (new) New / unmatched skill (orchestrated in API 2)

Skill enrichment (orchestrator / LLM)

No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).

Derived legacy fields

Category: Other
Sub-category: general
Skill nature: TOOL
Volatility: MEDIUM
Typical lifespan: MULTI_YEAR
Version strategy: UNVERSIONED

Reset Verification Secondary New / orchestrated API 3: new canonical path (new) New / unmatched skill (orchestrated in API 2)

Skill enrichment (orchestrator / LLM)

No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).

Derived legacy fields

Category: Other
Sub-category: general
Skill nature: TOOL
Volatility: MEDIUM
Typical lifespan: MULTI_YEAR
Version strategy: UNVERSIONED

Contention Checking Secondary New / orchestrated API 3: new canonical path (new) New / unmatched skill (orchestrated in API 2)

Skill enrichment (orchestrator / LLM)

No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).

Derived legacy fields

Category: Other
Sub-category: general
Skill nature: TOOL
Volatility: MEDIUM
Typical lifespan: MULTI_YEAR
Version strategy: UNVERSIONED

Abstraction Techniques Secondary New / orchestrated API 3: new canonical path (new) New / unmatched skill (orchestrated in API 2)

Skill enrichment (orchestrator / LLM)

No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).

Derived legacy fields

Category: Other
Sub-category: general
Skill nature: TOOL
Volatility: MEDIUM
Typical lifespan: MULTI_YEAR
Version strategy: UNVERSIONED

All API 3 persistence rows

Same grid as the skill-extractor “Persistence items” table: one row per (skill × dimension) work item.

Skill	Tag	Dimension	Skill↔dim	Role↔dim	Outcome
Python	in_db	Cloud Security Scripting & DSL Languages cloud-security-scripting-dsl-languages	✓	—	Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role)
Python	in_db	Programming Languages programming-languages	✓	—	Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role)
Python	in_db	Programming Languages and Scripting programming-languages-and-scripting	✓	—	Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role)
Python	in_db	Programming Languages for Data Work programming-languages-for-data-work	✓	—	Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role)
Python	in_db	Programming Languages for ML Systems programming-languages-for-ml-systems	✓	—	Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role)
Python	in_db	Programming Languages for XR programming-languages-for-xr	✓	—	Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role)
Python	in_db	Python Programming python-programming	✓	—	Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role)
Perl	in_db	React Frontend Development d_init_01	✓	—	Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role)

Library artifacts (this run)

Kind	Detail	DB id
canonical_skill_proposed	ASIC \| type=Other subtype=general nature=TOOL lifespan=MULTI_YEAR
canonical_skill_proposed	SystemVerilog \| type=Other subtype=general nature=TOOL lifespan=MULTI_YEAR
canonical_skill_proposed	VMM \| type=Other subtype=general nature=TOOL lifespan=MULTI_YEAR
canonical_skill_proposed	OVM \| type=Other subtype=general nature=TOOL lifespan=MULTI_YEAR
canonical_skill_proposed	UVM \| type=Other subtype=general nature=TOOL lifespan=MULTI_YEAR
canonical_skill_proposed	Synopsys VCS \| type=Other subtype=general nature=TOOL lifespan=MULTI_YEAR
canonical_skill_proposed	Cadence IES \| type=Other subtype=general nature=TOOL lifespan=MULTI_YEAR
canonical_skill_proposed	Assertion-Based Verification \| type=Other subtype=general nature=TOOL lifespan=MULTI_YEAR
canonical_skill_proposed	Metric-Driven Verification \| type=Other subtype=general nature=TOOL lifespan=MULTI_YEAR
canonical_skill_proposed	AXI \| type=Other subtype=general nature=TOOL lifespan=MULTI_YEAR
canonical_skill_proposed	DDR4 \| type=Other subtype=general nature=TOOL lifespan=MULTI_YEAR
canonical_skill_proposed	HBM \| type=Other subtype=general nature=TOOL lifespan=MULTI_YEAR
canonical_skill_proposed	PCIe \| type=Other subtype=general nature=TOOL lifespan=MULTI_YEAR
canonical_skill_proposed	Regression Management \| type=Other subtype=general nature=TOOL lifespan=MULTI_YEAR
canonical_skill_proposed	FPGA \| type=Other subtype=general nature=TOOL lifespan=MULTI_YEAR
canonical_skill_proposed	Coherency \| type=Other subtype=general nature=TOOL lifespan=MULTI_YEAR
canonical_skill_proposed	Computer Architecture \| type=Other subtype=general nature=TOOL lifespan=MULTI_YEAR
canonical_skill_proposed	Cadence IEV \| type=Other subtype=general nature=TOOL lifespan=MULTI_YEAR
canonical_skill_proposed	Jasper \| type=Other subtype=general nature=TOOL lifespan=MULTI_YEAR
canonical_skill_proposed	Synopsys Magellan \| type=Other subtype=general nature=TOOL lifespan=MULTI_YEAR
canonical_skill_proposed	Gate-Level Simulation \| type=Other subtype=general nature=TOOL lifespan=MULTI_YEAR
canonical_skill_proposed	Power Verification \| type=Other subtype=general nature=TOOL lifespan=MULTI_YEAR
canonical_skill_proposed	Reset Verification \| type=Other subtype=general nature=TOOL lifespan=MULTI_YEAR
canonical_skill_proposed	Contention Checking \| type=Other subtype=general nature=TOOL lifespan=MULTI_YEAR
canonical_skill_proposed	Abstraction Techniques \| type=Other subtype=general nature=TOOL lifespan=MULTI_YEAR

nano JD Parser — gpt-4.1-nano click to toggle

RoleASIC Verification Manager

CompanyGoodbits Tech Pvt Ltd

Experience7+ years OR a Master's degree in Electrical/Computer Engineering or Computer Science and 5+ years of experience

DomainOther

JD type pass

Show raw JSON

{
  "JD_type": "pass",
  "about_company": null,
  "certifications": [],
  "company_name": "Goodbits Tech Pvt Ltd",
  "ctc": null,
  "domain": {
    "primary": {
      "aliases": [],
      "domain": "Other"
    },
    "secondary": null
  },
  "education": [
    {
      "level": "Bachelor\u0027s",
      "qualification": "BTECH/BE - Electrical/Computer Engineering (or related)",
      "raw": "Bachelor\u0027s degree in Electrical/Computer Engineering or Computer Science",
      "requirement": "required"
    },
    {
      "level": "Master\u0027s",
      "qualification": "MTECH/ME - Electrical/Computer Engineering (or related)",
      "raw": "Master\u0027s degree in Electrical/Computer Engineering or Computer Science",
      "requirement": "required"
    }
  ],
  "experience": {
    "max": 7,
    "min": 5,
    "raw": "7+ years OR a Master\u0027s degree in Electrical/Computer Engineering or Computer Science and 5+ years of experience"
  },
  "job_locations": [],
  "role": "ASIC Verification Manager",
  "role_aliases": [
    "Verification Manager",
    "ASIC Verification Lead"
  ],
  "role_archetype": "Engineering",
  "roles_and_responsibilities": [
    {
      "bullet_count": 0,
      "heading": "Roles and Responsibilities",
      "heading_was_present": true,
      "source_marker": {
        "first_5_words": "Build and lead the verification",
        "last_5_words": "flows, and sign-off criteria for verification."
      },
      "text": "Build and lead the verification team.\nDrive the test bench architecture, verification plan and test bench development for full chip and subsystem verification.\nMentor and lead a team of verification engineers to complete unit, subsystem and chip level verification.\nDevelop and maintain methodology, flows, and sign-off criteria for verification.",
      "word_count": 52
    },
    {
      "bullet_count": 0,
      "heading": "The Ideal Candidate",
      "heading_was_present": true,
      "source_marker": {
        "first_5_words": "Experience with development of test",
        "last_5_words": "verification, power verification, reset verification."
      },
      "text": "Experience with development of test bench architecture, test plan and test bench development for full chip and subsystem verification\nHands on experience with System Verilog and VMM/OVM/UVM\nHands-on experience with simulation tools including Synopsys VCS, Cadence IES to verify full-chip SoCs and FPGA based designs\nRequires strong understanding of state-of-the-art verification techniques, including assertion and metric-driven verification.\nExperience in AXI, DDR4, HBM, PCIe verification is a plus\nVerification experience in hardware accelerators and coprocessors is a plus\nFamiliarity with verification management tools including regression management is required\nFamiliarity with scripting in Python or Perl\nStrong understanding of ASIC and/or full custom chip development process is required\nExperience with FPGA programming and software is a plus\nCoherency and computer architecture experience is desirable\nExperience with formal property checking tools such as Cadence (IEV), Jasper, and Synopsys (Magellan) is a plus.\nExperience with gate level simulation, power verification, reset verification, contention checking, abstraction techniques are a plus",
      "word_count": 174
    }
  ],
  "urls": [
    {
      "type": "other",
      "url": "mailto:careers@goodbits.in"
    }
  ]
}

API 1 — extract-from-jd click to toggle

{
  "final_skills": [
    {
      "is_primary": true,
      "skill_name": "ASIC"
    },
    {
      "is_primary": true,
      "skill_name": "SystemVerilog"
    },
    {
      "is_primary": true,
      "skill_name": "VMM"
    },
    {
      "is_primary": true,
      "skill_name": "OVM"
    },
    {
      "is_primary": true,
      "skill_name": "UVM"
    },
    {
      "is_primary": true,
      "skill_name": "Synopsys VCS"
    },
    {
      "is_primary": true,
      "skill_name": "Cadence IES"
    },
    {
      "is_primary": true,
      "skill_name": "Assertion-Based Verification"
    },
    {
      "is_primary": true,
      "skill_name": "Metric-Driven Verification"
    },
    {
      "is_primary": false,
      "skill_name": "AXI"
    },
    {
      "is_primary": false,
      "skill_name": "DDR4"
    },
    {
      "is_primary": false,
      "skill_name": "HBM"
    },
    {
      "is_primary": false,
      "skill_name": "PCIe"
    },
    {
      "is_primary": true,
      "skill_name": "Regression Management"
    },
    {
      "is_primary": false,
      "skill_name": "Python"
    },
    {
      "is_primary": false,
      "skill_name": "Perl"
    },
    {
      "is_primary": false,
      "skill_name": "FPGA"
    },
    {
      "is_primary": false,
      "skill_name": "Coherency"
    },
    {
      "is_primary": false,
      "skill_name": "Computer Architecture"
    },
    {
      "is_primary": false,
      "skill_name": "Cadence IEV"
    },
    {
      "is_primary": false,
      "skill_name": "Jasper"
    },
    {
      "is_primary": false,
      "skill_name": "Synopsys Magellan"
    },
    {
      "is_primary": false,
      "skill_name": "Gate-Level Simulation"
    },
    {
      "is_primary": false,
      "skill_name": "Power Verification"
    },
    {
      "is_primary": false,
      "skill_name": "Reset Verification"
    },
    {
      "is_primary": false,
      "skill_name": "Contention Checking"
    },
    {
      "is_primary": false,
      "skill_name": "Abstraction Techniques"
    }
  ],
  "jd_role": {
    "display_name": "ASIC Verification Manager",
    "rationale": null,
    "role_aliases": [
      "Verification Manager",
      "ASIC Verification Lead"
    ],
    "role_archetype": "Engineering",
    "slug": ""
  },
  "nano_parsed": {
    "JD_type": "pass",
    "about_company": null,
    "certifications": [],
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    "ctc": null,
    "domain": {
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        "aliases": [],
        "domain": "Other"
      },
      "secondary": null
    },
    "education": [
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        "level": "Bachelor\u0027s",
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      },
      {
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        "requirement": "required"
      }
    ],
    "experience": {
      "max": 7,
      "min": 5,
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    },
    "job_locations": [],
    "role": "ASIC Verification Manager",
    "role_aliases": [
      "Verification Manager",
      "ASIC Verification Lead"
    ],
    "role_archetype": "Engineering",
    "roles_and_responsibilities": [
      {
        "bullet_count": 0,
        "heading": "Roles and Responsibilities",
        "heading_was_present": true,
        "source_marker": {
          "first_5_words": "Build and lead the verification",
          "last_5_words": "flows, and sign-off criteria for verification."
        },
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        "word_count": 52
      },
      {
        "bullet_count": 0,
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          "last_5_words": "verification, power verification, reset verification."
        },
        "text": "Experience with development of test bench architecture, test plan and test bench development for full chip and subsystem verification\nHands on experience with System Verilog and VMM/OVM/UVM\nHands-on experience with simulation tools including Synopsys VCS, Cadence IES to verify full-chip SoCs and FPGA based designs\nRequires strong understanding of state-of-the-art verification techniques, including assertion and metric-driven verification.\nExperience in AXI, DDR4, HBM, PCIe verification is a plus\nVerification experience in hardware accelerators and coprocessors is a plus\nFamiliarity with verification management tools including regression management is required\nFamiliarity with scripting in Python or Perl\nStrong understanding of ASIC and/or full custom chip development process is required\nExperience with FPGA programming and software is a plus\nCoherency and computer architecture experience is desirable\nExperience with formal property checking tools such as Cadence (IEV), Jasper, and Synopsys (Magellan) is a plus.\nExperience with gate level simulation, power verification, reset verification, contention checking, abstraction techniques are a plus",
        "word_count": 174
      }
    ],
    "urls": [
      {
        "type": "other",
        "url": "mailto:careers@goodbits.in"
      }
    ]
  },
  "rejected": false,
  "rejection_reason": null,
  "run_id": "022f1ff1-5cc3-43e9-af91-5dbeb7548526",
  "stage3_signals": {
    "alias_found": false,
    "alias_match_roles": [],
    "kra_match_roles": [
      {
        "display_name": "MLOps Engineer",
        "kra_matches": [
          {
            "kra_text": "Validates model performance benchmarks, data schema contracts, and system integration health before signing off on production release readiness.",
            "sentence": "Develop and maintain methodology, flows, and sign-off criteria for verification.",
            "similarity": 0.4925
          },
          {
            "kra_text": "Validates model performance benchmarks, data schema contracts, and system integration health before signing off on production release readiness.",
            "sentence": "Drive the test bench architecture, verification plan and test bench development for full chip and subsystem verification.",
            "similarity": 0.4008
          },
          {
            "kra_text": "Validates model performance benchmarks, data schema contracts, and system integration health before signing off on production release readiness.",
            "sentence": "Requires strong understanding of state-of-the-art verification techniques, including assertion and metric-driven verification.",
            "similarity": 0.3886
          }
        ],
        "matched_count": null,
        "matched_skills": null,
        "role_id": 16,
        "score": 0.4273,
        "slug": "ml-ops-engineer",
        "total_count": null
      },
      {
        "display_name": "Cloud Architect",
        "kra_matches": [
          {
            "kra_text": "Conducts architecture reviews, approves technical design documents, and guides engineering teams through cloud migration and modernization projects.",
            "sentence": "Develop and maintain methodology, flows, and sign-off criteria for verification.",
            "similarity": 0.4519
          },
          {
            "kra_text": "Conducts architecture reviews, approves technical design documents, and guides engineering teams through cloud migration and modernization projects.",
            "sentence": "Mentor and lead a team of verification engineers to complete unit, subsystem and chip level verification.",
            "similarity": 0.4079
          },
          {
            "kra_text": "Conducts architecture reviews, approves technical design documents, and guides engineering teams through cloud migration and modernization projects.",
            "sentence": "Coherency and computer architecture experience is desirable",
            "similarity": 0.3514
          }
        ],
        "matched_count": null,
        "matched_skills": null,
        "role_id": 9,
        "score": 0.4037,
        "slug": "cloud-architect",
        "total_count": null
      },
      {
        "display_name": "Cyber Security Engineer",
        "kra_matches": [
          {
            "kra_text": "Defines secure engineering standards, secure coding guidelines, threat intelligence feeds, and compliance requirements for the organization.",
            "sentence": "Develop and maintain methodology, flows, and sign-off criteria for verification.",
            "similarity": 0.4553
          },
          {
            "kra_text": "Performs threat modeling, security architecture reviews, and quantitative risk analysis for new product features and infrastructure changes.",
            "sentence": "Mentor and lead a team of verification engineers to complete unit, subsystem and chip level verification.",
            "similarity": 0.3829
          },
          {
            "kra_text": "Performs threat modeling, security architecture reviews, and quantitative risk analysis for new product features and infrastructure changes.",
            "sentence": "Drive the test bench architecture, verification plan and test bench development for full chip and subsystem verification.",
            "similarity": 0.3625
          }
        ],
        "matched_count": null,
        "matched_skills": null,
        "role_id": 5,
        "score": 0.4002,
        "slug": "cybersecurity-engineer",
        "total_count": null
      },
      {
        "display_name": "PHP Backend Developer",
        "kra_matches": [
          {
            "kra_text": "validation and authorization safeguards",
            "sentence": "Develop and maintain methodology, flows, and sign-off criteria for verification.",
            "similarity": 0.4214
          },
          {
            "kra_text": "validation and authorization safeguards",
            "sentence": "Requires strong understanding of state-of-the-art verification techniques, including assertion and metric-driven verification.",
            "similarity": 0.405
          },
          {
            "kra_text": "validation and authorization safeguards",
            "sentence": "Verification experience in hardware accelerators and coprocessors is a plus",
            "similarity": 0.3718
          }
        ],
        "matched_count": null,
        "matched_skills": null,
        "role_id": 86,
        "score": 0.3994,
        "slug": "php-backend-developer",
        "total_count": null
      },
      {
        "display_name": "Angular Frontend Developer",
        "kra_matches": [
          {
            "kra_text": "collaboration with design and QA",
            "sentence": "Develop and maintain methodology, flows, and sign-off criteria for verification.",
            "similarity": 0.4427
          },
          {
            "kra_text": "collaboration with design and QA",
            "sentence": "Mentor and lead a team of verification engineers to complete unit, subsystem and chip level verification.",
            "similarity": 0.3933
          },
          {
            "kra_text": "collaboration with design and QA",
            "sentence": "Drive the test bench architecture, verification plan and test bench development for full chip and subsystem verification.",
            "similarity": 0.3542
          }
        ],
        "matched_count": null,
        "matched_skills": null,
        "role_id": 90,
        "score": 0.3968,
        "slug": "angular-frontend-developer",
        "total_count": null
      }
    ],
    "skill_match_roles": []
  },
  "stage4_decision": {
    "alias_collision_detected": false,
    "case": "DOMAIN",
    "chosen_role": {
      "display_name": "FPGA / ASIC Engineer",
      "kra_matches": null,
      "matched_count": null,
      "matched_skills": null,
      "role_id": 216,
      "score": 0.99,
      "slug": "fpga-asic-engineer",
      "total_count": null
    },
    "confidence": 0.99,
    "is_new_role": false,
    "llm2_fired": false,
    "llm2_reasoning": null,
    "matched_dimensions": [
      "ASIC Verification Leadership",
      "Test Bench Architecture and Development",
      "Full-Chip and Subsystem Verification",
      "Verification Methodology and Sign-off",
      "Simulation and Formal Verification",
      "Regression Management",
      "Hardware Architecture Verification"
    ],
    "matched_kras": [
      "Build and lead the verification team",
      "Drive the test bench architecture",
      "Develop verification plan and test bench development",
      "Lead unit, subsystem and chip level verification",
      "Develop and maintain methodology, flows, and sign-off criteria"
    ],
    "matched_skills": [
      "System Verilog",
      "VMM",
      "OVM",
      "UVM",
      "Synopsys VCS",
      "Cadence IES",
      "AXI",
      "DDR4",
      "HBM",
      "PCIe",
      "Python",
      "Perl",
      "Cadence (IEV)",
      "Jasper",
      "Synopsys (Magellan)"
    ],
    "new_role_display_name": null,
    "new_role_slug": null,
    "queued": false,
    "reasoning": "Domain=Hardware Engineering; The JD is explicitly about ASIC verification leadership, test bench architecture, UVM-based verification, and SoC/full-chip verification, which matches the FPGA/ASIC Engineer role best.",
    "sub_role": null
  },
  "stage5_updates": {
    "centroid_n_after": 1,
    "centroid_updated": true,
    "collision_log_id": null,
    "new_kra_attached": {
      "best_kra_similarity": 0.0,
      "queue_id": 759,
      "r_and_r_preview": "Build and lead the verification team.\nDrive the test bench architecture, verification plan and test bench development for full chip and subsystem verification.\nMentor and lead a team of verification e",
      "role_display_name": "FPGA / ASIC Engineer",
      "role_slug": "fpga-asic-engineer",
      "status": "pending"
    },
    "new_skills_attached": [
      {
        "is_primary": true,
        "queue_id": 11322,
        "role_display_name": "FPGA / ASIC Engineer",
        "role_slug": "fpga-asic-engineer",
        "skill_name": "ASIC",
        "status": "pending"
      },
      {
        "is_primary": true,
        "queue_id": 11323,
        "role_display_name": "FPGA / ASIC Engineer",
        "role_slug": "fpga-asic-engineer",
        "skill_name": "SystemVerilog",
        "status": "pending"
      },
      {
        "is_primary": true,
        "queue_id": 11324,
        "role_display_name": "FPGA / ASIC Engineer",
        "role_slug": "fpga-asic-engineer",
        "skill_name": "VMM",
        "status": "pending"
      },
      {
        "is_primary": true,
        "queue_id": 11325,
        "role_display_name": "FPGA / ASIC Engineer",
        "role_slug": "fpga-asic-engineer",
        "skill_name": "OVM",
        "status": "pending"
      },
      {
        "is_primary": true,
        "queue_id": 11326,
        "role_display_name": "FPGA / ASIC Engineer",
        "role_slug": "fpga-asic-engineer",
        "skill_name": "UVM",
        "status": "pending"
      },
      {
        "is_primary": true,
        "queue_id": 11328,
        "role_display_name": "FPGA / ASIC Engineer",
        "role_slug": "fpga-asic-engineer",
        "skill_name": "Synopsys VCS",
        "status": "pending"
      },
      {
        "is_primary": true,
        "queue_id": 11329,
        "role_display_name": "FPGA / ASIC Engineer",
        "role_slug": "fpga-asic-engineer",
        "skill_name": "Cadence IES",
        "status": "pending"
      },
      {
        "is_primary": true,
        "queue_id": 11330,
        "role_display_name": "FPGA / ASIC Engineer",
        "role_slug": "fpga-asic-engineer",
        "skill_name": "Assertion-Based Verification",
        "status": "pending"
      },
      {
        "is_primary": true,
        "queue_id": 11332,
        "role_display_name": "FPGA / ASIC Engineer",
        "role_slug": "fpga-asic-engineer",
        "skill_name": "Metric-Driven Verification",
        "status": "pending"
      },
      {
        "is_primary": false,
        "queue_id": 11333,
        "role_display_name": "FPGA / ASIC Engineer",
        "role_slug": "fpga-asic-engineer",
        "skill_name": "AXI",
        "status": "pending"
      },
      {
        "is_primary": false,
        "queue_id": 11334,
        "role_display_name": "FPGA / ASIC Engineer",
        "role_slug": "fpga-asic-engineer",
        "skill_name": "DDR4",
        "status": "pending"
      },
      {
        "is_primary": false,
        "queue_id": 11335,
        "role_display_name": "FPGA / ASIC Engineer",
        "role_slug": "fpga-asic-engineer",
        "skill_name": "HBM",
        "status": "pending"
      },
      {
        "is_primary": false,
        "queue_id": 11338,
        "role_display_name": "FPGA / ASIC Engineer",
        "role_slug": "fpga-asic-engineer",
        "skill_name": "PCIe",
        "status": "pending"
      },
      {
        "is_primary": true,
        "queue_id": 11339,
        "role_display_name": "FPGA / ASIC Engineer",
        "role_slug": "fpga-asic-engineer",
        "skill_name": "Regression Management",
        "status": "pending"
      },
      {
        "is_primary": false,
        "queue_id": 11340,
        "role_display_name": "FPGA / ASIC Engineer",
        "role_slug": "fpga-asic-engineer",
        "skill_name": "FPGA",
        "status": "pending"
      },
      {
        "is_primary": false,
        "queue_id": 11341,
        "role_display_name": "FPGA / ASIC Engineer",
        "role_slug": "fpga-asic-engineer",
        "skill_name": "Coherency",
        "status": "pending"
      },
      {
        "is_primary": false,
        "queue_id": 11342,
        "role_display_name": "FPGA / ASIC Engineer",
        "role_slug": "fpga-asic-engineer",
        "skill_name": "Computer Architecture",
        "status": "pending"
      },
      {
        "is_primary": false,
        "queue_id": 11343,
        "role_display_name": "FPGA / ASIC Engineer",
        "role_slug": "fpga-asic-engineer",
        "skill_name": "Cadence IEV",
        "status": "pending"
      },
      {
        "is_primary": false,
        "queue_id": 11344,
        "role_display_name": "FPGA / ASIC Engineer",
        "role_slug": "fpga-asic-engineer",
        "skill_name": "Jasper",
        "status": "pending"
      },
      {
        "is_primary": false,
        "queue_id": 11345,
        "role_display_name": "FPGA / ASIC Engineer",
        "role_slug": "fpga-asic-engineer",
        "skill_name": "Synopsys Magellan",
        "status": "pending"
      },
      {
        "is_primary": false,
        "queue_id": 11346,
        "role_display_name": "FPGA / ASIC Engineer",
        "role_slug": "fpga-asic-engineer",
        "skill_name": "Gate-Level Simulation",
        "status": "pending"
      },
      {
        "is_primary": false,
        "queue_id": 11347,
        "role_display_name": "FPGA / ASIC Engineer",
        "role_slug": "fpga-asic-engineer",
        "skill_name": "Power Verification",
        "status": "pending"
      },
      {
        "is_primary": false,
        "queue_id": 11348,
        "role_display_name": "FPGA / ASIC Engineer",
        "role_slug": "fpga-asic-engineer",
        "skill_name": "Reset Verification",
        "status": "pending"
      },
      {
        "is_primary": false,
        "queue_id": 11349,
        "role_display_name": "FPGA / ASIC Engineer",
        "role_slug": "fpga-asic-engineer",
        "skill_name": "Contention Checking",
        "status": "pending"
      },
      {
        "is_primary": false,
        "queue_id": 11350,
        "role_display_name": "FPGA / ASIC Engineer",
        "role_slug": "fpga-asic-engineer",
        "skill_name": "Abstraction Techniques",
        "status": "pending"
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    ],
    "queue_entry_id": null,
    "v3_pipeline_triggered": false,
    "v3_role_slug": null,
    "v3_run_id": null
  }
}

API 2 — extract-details

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      "input_term": "Python",
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        "is_also_category": false,
        "is_extractable": true,
        "skill_nature": "LANGUAGE",
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        "sub_category_id": 96,
        "typical_lifespan": "EVERGREEN",
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      "matched_via": "alias"
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        "typical_lifespan": "EVERGREEN",
        "volatility": "STABLE"
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      "matched_via": "alias"
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      "slug": "ar-vr-engineer",
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        "difficulty_hint": "well_known",
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        "source": "db"
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      "input_skill": "Python",
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      "roles_from_db": [
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      ]
    },
    {
      "dimension": {
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        "rationale": "Primary implementation languages used to build client and server feature code. Full stack engineers need enough fluency to move across layers and implement product behavior end to end.",
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        "source": "db"
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      "input_skill": "Python",
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        {
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      ]
    },
    {
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        "source": "db"
      },
      "input_skill": "Python",
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          "display_name": "Cyber Security Engineer",
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    },
    {
      "dimension": {
        "difficulty_hint": "well_known",
        "display_name": "Programming Languages for Data Work",
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        "rationale": "Languages used to implement data pipelines, transformations, and operational glue. This is the primary coding surface for building ingestion, enrichment, and automation logic in data engineering.",
        "slug": "programming-languages-for-data-work",
        "source": "db"
      },
      "input_skill": "Python",
      "llm_role": null,
      "roles_from_db": [
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    },
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        "rationale": "Primary implementation languages used to build immersive client features, interaction logic, and device-specific runtime behavior. This is the core coding surface for AR/VR experiences.",
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        "source": "db"
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      "dimension": {
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        "slug": "python-programming",
        "source": "db"
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      "roles_from_db": [
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      ]
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        "display_name": "React Frontend Development",
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        "rationale": "Building interactive web user interfaces with React.js, including component composition, state management, hooks, and rendering patterns. React.js belongs here because it is a core library for client-side UI development in modern web applications.",
        "slug": "d_init_01",
        "source": "db"
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  "new_aliases_persisted": 0,
  "run_id": "022f1ff1-5cc3-43e9-af91-5dbeb7548526",
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        "keep_log": [],
        "locked_dimensions": [],
        "merge_log": [],
        "placed": null,
        "relationships": null,
        "skill_id": "power-verification",
        "split_log": [],
        "typed": null,
        "warnings": []
      },
      "source_tag": "llm",
      "was_in_llm_skills": true
    },
    {
      "aliases_in_db": [],
      "canonical": null,
      "dimensions": [],
      "input_skill": "Reset Verification",
      "matched_via": null,
      "new_alias_persisted": false,
      "new_alias_text": null,
      "new_skill_meta": {
        "derived": {
          "category": "Other",
          "skill_nature": "TOOL",
          "sub_category": "general",
          "typical_lifespan": "MULTI_YEAR",
          "version_strategy": "UNVERSIONED",
          "volatility": "MEDIUM"
        },
        "enrichment": null,
        "keep_log": [],
        "locked_dimensions": [],
        "merge_log": [],
        "placed": null,
        "relationships": null,
        "skill_id": "reset-verification",
        "split_log": [],
        "typed": null,
        "warnings": []
      },
      "source_tag": "llm",
      "was_in_llm_skills": true
    },
    {
      "aliases_in_db": [],
      "canonical": null,
      "dimensions": [],
      "input_skill": "Contention Checking",
      "matched_via": null,
      "new_alias_persisted": false,
      "new_alias_text": null,
      "new_skill_meta": {
        "derived": {
          "category": "Other",
          "skill_nature": "TOOL",
          "sub_category": "general",
          "typical_lifespan": "MULTI_YEAR",
          "version_strategy": "UNVERSIONED",
          "volatility": "MEDIUM"
        },
        "enrichment": null,
        "keep_log": [],
        "locked_dimensions": [],
        "merge_log": [],
        "placed": null,
        "relationships": null,
        "skill_id": "contention-checking",
        "split_log": [],
        "typed": null,
        "warnings": []
      },
      "source_tag": "llm",
      "was_in_llm_skills": true
    },
    {
      "aliases_in_db": [],
      "canonical": null,
      "dimensions": [],
      "input_skill": "Abstraction Techniques",
      "matched_via": null,
      "new_alias_persisted": false,
      "new_alias_text": null,
      "new_skill_meta": {
        "derived": {
          "category": "Other",
          "skill_nature": "TOOL",
          "sub_category": "general",
          "typical_lifespan": "MULTI_YEAR",
          "version_strategy": "UNVERSIONED",
          "volatility": "MEDIUM"
        },
        "enrichment": null,
        "keep_log": [],
        "locked_dimensions": [],
        "merge_log": [],
        "placed": null,
        "relationships": null,
        "skill_id": "abstraction-techniques",
        "split_log": [],
        "typed": null,
        "warnings": []
      },
      "source_tag": "llm",
      "was_in_llm_skills": true
    }
  ],
  "unmatched_skills": [
    "ASIC",
    "SystemVerilog",
    "VMM",
    "OVM",
    "UVM",
    "Synopsys VCS",
    "Cadence IES",
    "Assertion-Based Verification",
    "Metric-Driven Verification",
    "AXI",
    "DDR4",
    "HBM",
    "PCIe",
    "Regression Management",
    "FPGA",
    "Coherency",
    "Computer Architecture",
    "Cadence IEV",
    "Jasper",
    "Synopsys Magellan",
    "Gate-Level Simulation",
    "Power Verification",
    "Reset Verification",
    "Contention Checking",
    "Abstraction Techniques"
  ]
}

API 3 — final-role-output

{
  "chosen_role": {
    "display_name": "FPGA / ASIC Engineer",
    "id": 216,
    "rationale": "Domain=Hardware Engineering; The JD is explicitly about ASIC verification leadership, test bench architecture, UVM-based verification, and SoC/full-chip verification, which matches the FPGA/ASIC Engineer role best.",
    "role_archetype": null,
    "slug": "fpga-asic-engineer",
    "source": "db"
  },
  "chosen_role_resolution": "in_db",
  "final_input_skills": [
    {
      "skill": "ASIC",
      "tag": "new"
    },
    {
      "skill": "SystemVerilog",
      "tag": "new"
    },
    {
      "skill": "VMM",
      "tag": "new"
    },
    {
      "skill": "OVM",
      "tag": "new"
    },
    {
      "skill": "UVM",
      "tag": "new"
    },
    {
      "skill": "Synopsys VCS",
      "tag": "new"
    },
    {
      "skill": "Cadence IES",
      "tag": "new"
    },
    {
      "skill": "Assertion-Based Verification",
      "tag": "new"
    },
    {
      "skill": "Metric-Driven Verification",
      "tag": "new"
    },
    {
      "skill": "AXI",
      "tag": "new"
    },
    {
      "skill": "DDR4",
      "tag": "new"
    },
    {
      "skill": "HBM",
      "tag": "new"
    },
    {
      "skill": "PCIe",
      "tag": "new"
    },
    {
      "skill": "Regression Management",
      "tag": "new"
    },
    {
      "skill": "Python",
      "tag": "in_db"
    },
    {
      "skill": "Perl",
      "tag": "in_db"
    },
    {
      "skill": "FPGA",
      "tag": "new"
    },
    {
      "skill": "Coherency",
      "tag": "new"
    },
    {
      "skill": "Computer Architecture",
      "tag": "new"
    },
    {
      "skill": "Cadence IEV",
      "tag": "new"
    },
    {
      "skill": "Jasper",
      "tag": "new"
    },
    {
      "skill": "Synopsys Magellan",
      "tag": "new"
    },
    {
      "skill": "Gate-Level Simulation",
      "tag": "new"
    },
    {
      "skill": "Power Verification",
      "tag": "new"
    },
    {
      "skill": "Reset Verification",
      "tag": "new"
    },
    {
      "skill": "Contention Checking",
      "tag": "new"
    },
    {
      "skill": "Abstraction Techniques",
      "tag": "new"
    }
  ],
  "llm_cost_api1_usd": null,
  "llm_cost_api2_usd": null,
  "llm_cost_api3_usd": null,
  "llm_cost_total_usd": null,
  "persistence": {
    "items": [
      {
        "chosen_role_id": 216,
        "dimension": {
          "difficulty_hint": "well_known",
          "display_name": "Cloud Security Scripting \u0026 DSL Languages",
          "id": 248,
          "rationale": "Proficiency in programming and domain-specific languages used to automate and script cloud security controls.",
          "slug": "cloud-security-scripting-dsl-languages",
          "source": "db"
        },
        "dimension_id": 248,
        "input_skill": "Python",
        "llm_role": null,
        "matched_chosen_role": false,
        "outcome_line": "Existing dimension (library) \u00b7 Role\u2194dimension skipped (dimension not under chosen role)",
        "role_dimension_saved": false,
        "roles_from_db": [
          {
            "display_name": "Cloud Security Engineer",
            "id": 23,
            "rationale": null,
            "role_archetype": null,
            "slug": "cloud-security-engineer",
            "source": "db"
          }
        ],
        "skill_dimension_saved": true,
        "skill_id": 5,
        "skill_tag": "in_db",
        "skipped_reason": null
      },
      {
        "chosen_role_id": 216,
        "dimension": {
          "difficulty_hint": "well_known",
          "display_name": "Programming Languages",
          "id": 1,
          "rationale": "Primary implementation languages used to build client and server feature code. Full stack engineers need enough fluency to move across layers and implement product behavior end to end.",
          "slug": "programming-languages",
          "source": "db"
        },
        "dimension_id": 1,
        "input_skill": "Python",
        "llm_role": null,
        "matched_chosen_role": false,
        "outcome_line": "Existing dimension (library) \u00b7 Role\u2194dimension skipped (dimension not under chosen role)",
        "role_dimension_saved": false,
        "roles_from_db": [
          {
            "display_name": "Backend Developer",
            "id": 1,
            "rationale": null,
            "role_archetype": "A Backend Engineer designs, builds, and maintains the server-side logic and data handling that power applications and services. They focus on implementing reliable business functionality, integrating with other systems, and ensuring the backend is scalable, maintainable, and observable.",
            "slug": "backend-engineer",
            "source": "db"
          },
          {
            "display_name": "Fullstack Developer",
            "id": 435,
            "rationale": null,
            "role_archetype": "Engineering",
            "slug": "fullstack-developer",
            "source": "db"
          },
          {
            "display_name": "Fullstack Developer",
            "id": 15,
            "rationale": null,
            "role_archetype": null,
            "slug": "full-stack-engineer",
            "source": "db"
          }
        ],
        "skill_dimension_saved": true,
        "skill_id": 5,
        "skill_tag": "in_db",
        "skipped_reason": null
      },
      {
        "chosen_role_id": 216,
        "dimension": {
          "difficulty_hint": "well_known",
          "display_name": "Programming Languages and Scripting",
          "id": 59,
          "rationale": "Languages used to write security automation, analysis scripts, detection logic, and remediation helpers. This is the primary implementation surface for a cybersecurity engineer across tooling and response workflows.",
          "slug": "programming-languages-and-scripting",
          "source": "db"
        },
        "dimension_id": 59,
        "input_skill": "Python",
        "llm_role": null,
        "matched_chosen_role": false,
        "outcome_line": "Existing dimension (library) \u00b7 Role\u2194dimension skipped (dimension not under chosen role)",
        "role_dimension_saved": false,
        "roles_from_db": [
          {
            "display_name": "Cyber Security Engineer",
            "id": 5,
            "rationale": null,
            "role_archetype": null,
            "slug": "cybersecurity-engineer",
            "source": "db"
          }
        ],
        "skill_dimension_saved": true,
        "skill_id": 5,
        "skill_tag": "in_db",
        "skipped_reason": null
      },
      {
        "chosen_role_id": 216,
        "dimension": {
          "difficulty_hint": "well_known",
          "display_name": "Programming Languages for Data Work",
          "id": 21,
          "rationale": "Languages used to implement data pipelines, transformations, and operational glue. This is the primary coding surface for building ingestion, enrichment, and automation logic in data engineering.",
          "slug": "programming-languages-for-data-work",
          "source": "db"
        },
        "dimension_id": 21,
        "input_skill": "Python",
        "llm_role": null,
        "matched_chosen_role": false,
        "outcome_line": "Existing dimension (library) \u00b7 Role\u2194dimension skipped (dimension not under chosen role)",
        "role_dimension_saved": false,
        "roles_from_db": [
          {
            "display_name": "Data Engineer",
            "id": 2,
            "rationale": null,
            "role_archetype": null,
            "slug": "data-engineer",
            "source": "db"
          }
        ],
        "skill_dimension_saved": true,
        "skill_id": 5,
        "skill_tag": "in_db",
        "skipped_reason": null
      },
      {
        "chosen_role_id": 216,
        "dimension": {
          "difficulty_hint": "well_known",
          "display_name": "Programming Languages for ML Systems",
          "id": 39,
          "rationale": "Languages used to build training code, inference services, evaluation jobs, and ML glue code. This is the primary implementation surface for ML engineers across experimentation and productionization.",
          "slug": "programming-languages-for-ml-systems",
          "source": "db"
        },
        "dimension_id": 39,
        "input_skill": "Python",
        "llm_role": null,
        "matched_chosen_role": false,
        "outcome_line": "Existing dimension (library) \u00b7 Role\u2194dimension skipped (dimension not under chosen role)",
        "role_dimension_saved": false,
        "roles_from_db": [
          {
            "display_name": "ML Engineer",
            "id": 3,
            "rationale": null,
            "role_archetype": null,
            "slug": "ml-engineer",
            "source": "db"
          },
          {
            "display_name": "MLOps Engineer",
            "id": 16,
            "rationale": null,
            "role_archetype": null,
            "slug": "ml-ops-engineer",
            "source": "db"
          }
        ],
        "skill_dimension_saved": true,
        "skill_id": 5,
        "skill_tag": "in_db",
        "skipped_reason": null
      },
      {
        "chosen_role_id": 216,
        "dimension": {
          "difficulty_hint": "well_known",
          "display_name": "Programming Languages for XR",
          "id": 97,
          "rationale": "Primary implementation languages used to build immersive client features, interaction logic, and device-specific runtime behavior. This is the core coding surface for AR/VR experiences.",
          "slug": "programming-languages-for-xr",
          "source": "db"
        },
        "dimension_id": 97,
        "input_skill": "Python",
        "llm_role": null,
        "matched_chosen_role": false,
        "outcome_line": "Existing dimension (library) \u00b7 Role\u2194dimension skipped (dimension not under chosen role)",
        "role_dimension_saved": false,
        "roles_from_db": [
          {
            "display_name": "AR/VR Engineer",
            "id": 8,
            "rationale": null,
            "role_archetype": null,
            "slug": "ar-vr-engineer",
            "source": "db"
          }
        ],
        "skill_dimension_saved": true,
        "skill_id": 5,
        "skill_tag": "in_db",
        "skipped_reason": null
      },
      {
        "chosen_role_id": 216,
        "dimension": {
          "difficulty_hint": "well_known",
          "display_name": "Python Programming",
          "id": 290,
          "rationale": "Core Python language skills used to implement backend business logic, request handlers, integrations, and service internals. This is the primary coding surface for the role.",
          "slug": "python-programming",
          "source": "db"
        },
        "dimension_id": 290,
        "input_skill": "Python",
        "llm_role": null,
        "matched_chosen_role": false,
        "outcome_line": "Existing dimension (library) \u00b7 Role\u2194dimension skipped (dimension not under chosen role)",
        "role_dimension_saved": false,
        "roles_from_db": [
          {
            "display_name": "Python Backend Developer",
            "id": 80,
            "rationale": null,
            "role_archetype": "Engineering",
            "slug": "python-backend-developer",
            "source": "db"
          }
        ],
        "skill_dimension_saved": true,
        "skill_id": 5,
        "skill_tag": "in_db",
        "skipped_reason": null
      },
      {
        "chosen_role_id": 216,
        "dimension": {
          "difficulty_hint": "well_known",
          "display_name": "React Frontend Development",
          "id": 96,
          "rationale": "Building interactive web user interfaces with React.js, including component composition, state management, hooks, and rendering patterns. React.js belongs here because it is a core library for client-side UI development in modern web applications.",
          "slug": "d_init_01",
          "source": "db"
        },
        "dimension_id": 96,
        "input_skill": "Perl",
        "llm_role": null,
        "matched_chosen_role": false,
        "outcome_line": "Existing dimension (library) \u00b7 Role\u2194dimension skipped (dimension not under chosen role)",
        "role_dimension_saved": false,
        "roles_from_db": [],
        "skill_dimension_saved": true,
        "skill_id": 1001,
        "skill_tag": "in_db",
        "skipped_reason": null
      }
    ],
    "new_skills_created": 0,
    "role_dimension_saved": 0,
    "skill_dimension_saved": 0,
    "skipped": 0
  },
  "planner_output": null,
  "run_id": "022f1ff1-5cc3-43e9-af91-5dbeb7548526"
}

LLM Calls

Every model call made for this run, in pipeline order. Click a card to see the model's response.

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