Pipeline run

432c8b48-8330-4074-a062-4b38ce5f1ec0

Pipeline LLM cost (USD)

API 1: $0.0037 API 2: $0.0006 API 3: $0.0000 Total: $0.0043

Client output enrichment

v2 Skill cluster · Nature of work · AI index · Tech stack maturity · Evidence · KRA description

role baseline loaded sources · ai_index: jd · nature_of_work: jd · tech_stack_maturity: jd

Nature of work · Integration and event handling

Own server platform firmware integration and validation across SoC FW, BIOS, BMC, RAS and reset flows; build test plans/automation, debug platform issues, and create dashboards to track system health, quality, and release readiness.

"Owns SOC and Platform FW Integration, validation (including validation environment), and debugging of different domains within server architecture"

Tech stack maturity

Mainstream Modern

AI index (0 = no AI use, 5 = totally AI-dependent · v2.1)

0.20 / 5

· Title match

✓ Has AI skill

· AI skill (primary)

· AI skill (secondary)

· On AI team

· Builds AI products

vocab breakdown (legacy)

Assistants (×1): —

Frameworks (×2): —

Models / concepts (×3): AI

Evidence — skills matched in JD (16)

BIOS BMC RAS Firmware System Software Validation Test Automation Release Automation Server Architecture SoC Platform Firmware Integration Dashboarding Thermal Power Stability Performance

Skill cluster (1 dimension groups, role-scoped)

Cross-cutting / unaligned

BIOS BMC RAS Firmware System Software Validation Test Automation Release Automation Server Architecture SoC Platform Firmware Integration Dashboarding Thermal Power Stability Performance

Show KRA description ↓

Successful candidates are expected to exhibit some or all the traits below on this job: • Owns SOC and Platform FW Integration, validation (including validation environment), and debugging of different domains within server architecture (such as SoC FWs, BIOS, BMC, RAS, Reset etc.) • Ability to see system level “big picture” to validate that the integrated firmware/system software aligns to architectural goals of product in order to meet the defined use cases and KPIs (thermal, power, stability and performance). • Collaborate with system and FW architects to gather the requirements, translate to validation plans, develop test content, automate executions, and debug/triage of observed/reported failures. • Excellent debugging and troubleshooting skills with aim to become point-of-contact for platform level issues. Ensure systematic closure of issues for subsequent releases. • Deeply collaborate with architect, firmware, program management and component dev teams for day-to-days operations as well as for long term roadmap improvements by feeding back key learnings • Passionate about exploring and deploying noble methods to improve test coverage, release/test automation, and efficiency of our FW releases. • Create automated dashboards to always reflect “health” and “quality” of system for decision making

Signals

Skill —

—

Alias backend-engineer

1.00

KRA flutter-developer

0.54

Post-classification

Centroidupdated · n=1721

Alias collision log—

New-role queue—

New skills captured16

New KRA capturedyes

Captured for admin review

BIOS primary ↔ Backend Developer pending

BMC primary ↔ Backend Developer pending

RAS primary ↔ Backend Developer pending

Firmware primary ↔ Backend Developer pending

System Software primary ↔ Backend Developer pending

Validation primary ↔ Backend Developer pending

Test Automation primary ↔ Backend Developer pending

Release Automation primary ↔ Backend Developer pending

Dashboarding ↔ Backend Developer pending

Server Architecture primary ↔ Backend Developer pending

SoC primary ↔ Backend Developer pending

Platform Firmware Integration primary ↔ Backend Developer pending

Thermal ↔ Backend Developer pending

Power ↔ Backend Developer pending

Stability ↔ Backend Developer pending

Performance ↔ Backend Developer pending

R&R fragment (sim 0.00) ↔ Backend Developer pending

Status: completed Created: 2026-05-27T17:37:28.700889Z Updated: 2026-05-27T17:38:52.688677Z API 3 duration: 1032 ms

Flow Current 3-step pipeline

1 POST /skills/extract-from-jd

2 POST /skills/extract-details

3 POST /skills/final-role-output

Role Chosen role & resolution

Backend Developer

CASE A

slug: backend-engineer · id: 1 · source: db

Exact alias hit on backend-engineer (1.0) — no other alias at this confidence; skill_top absent does not contradict

Resolution: in_db — role exists in library; skill↔dim and role↔dim links saved when applicable.

New skills

Skill↔dim saved

Role↔dim saved

Skipped

Job description

Overview

Microsoft Silicon and Cloud Hardware Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Skype, OneDrive and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission.

Are you passionate about working on cutting edge new technology in a team that embodies the growth mindset? Are you hoping to join an organization which is built on a mission “To empower every person and organization on this planet to achieve more”?

We are working on the next generation Hardware/Firmware for server, silicon, and rack infrastructure with a focus on innovation in firmware technology to secure Azure infrastructure for Microsoft and their customers. Our SCHIE team works closely with AI and Azure-Core for bring up of Cobalt-100 and Maia-100 system in Azure Datacentre.

We are looking for a highly motivated senior Software Engineer with experience in System on Chip Architecture (SoC), Bring up of SoC, root causing issues at the intersection of multiple subsystems across firmware and hardware

Responsibilities

Successful candidates are expected to exhibit some or all the traits below on this job:

• Owns SOC and Platform FW Integration, validation (including validation environment), and debugging of different domains within server architecture (such as SoC FWs, BIOS, BMC, RAS, Reset etc.) 
• Ability to see system level “big picture” to validate that the integrated firmware/system software aligns to architectural goals of product in order to meet the defined use cases and KPIs (thermal, power, stability and performance). 
• Collaborate with system and FW architects to gather the requirements, translate to validation plans, develop test content, automate executions, and debug/triage of observed/reported failures. 
• Excellent debugging and troubleshooting skills with aim to become point-of-contact for platform level issues. Ensure systematic closure of issues for subsequent releases. 
• Deeply collaborate with architect, firmware, program management and component dev teams for day-to-days operations as well as for long term roadmap improvements by feeding back key learnings 
• Passionate about exploring and deploying noble methods to improve test coverage, release/test automation, and efficiency of our FW releases. 
• Create automated dashboards to always reflect “health” and “quality” of system for decision making


Qualifications

• Bachelor’s or higher in Computer Science, Computer Engineering, Electronics Engineering, or similar. 
• Strong problem solving, debugging, and troubleshooting skills. 
• Hands on experience in programming in Python or C or C++ 
• 10+ years of working experience in design & architecture, development, validation/testing, and release and performance tuning. 
• Experience with Platform initialization, Board support package (UEFI/U-Boot), integration, Use-case Validation, features validation, low level drivers for peripherals such as PCIe, I2C, eMMC, SPI, USB, UARTs as well as Memory Management, Scheduling, Interrupts, and multi-threading. 
• Platform Debugging in Windows or Linux environment. 
• Exposure to CPU’s, GPU’s, end-to-end validation understanding, triaging/resolving customer issues


Preferred Qualifications

• Demonstrated experience in system level Integration, validation (including validation infrastructure setup), automation framework (such as Robot Framework), and debugging of system software 
• Experience in use-case/feature level validation / development in server space is big plus (such as telemetry, RAS, firmware update, BMC). 
• Experience of creating validation test plans, developing test content to achieve the validation plan, and automating the execution of test contents. 
• Experience of creating or working with automated testing pipeline aka CI/CD (integration + validation) 
• Experience of firmware development and testing on multiple HW test environments (FPGA, Emulation, Simulation etc.) 
• Good knowledge of hardware debuggers like JTAG, Oscilloscope, and Logic Analyzer etc. 
• Knowledge of automation framework setup and deployment. 
• Excellent communication and inter-team collaboration skills 
• Debug experience resulting into solving complex Hardware/Firmware interface issues 
• Experience in validation / development in server space is big plus


#SCHIEINDIA

#AHSI

Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, color, family or medical care leave, gender identity or expression, genetic information, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran status, race, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable laws, regulations and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application or the recruiting process, please send a request via the Accommodation request form .

Benefits/perks listed below may vary depending on the nature of your employment with Microsoft and the country where you work.

Skills from this JD

Each row merges API 1 extraction, API 2 library match / v3 orchestration (dimensions + locked dims), and API 3 persistence tags.

BIOS Primary New / orchestrated API 3: new canonical path (new) New / unmatched skill (orchestrated in API 2)

Skill enrichment (orchestrator / LLM)