Pipeline run
7252e427-a97a-432b-967e-3f3f869cd9a0
Client output enrichment
v2 Skill cluster · Nature of work · AI index · Tech stack maturity · Evidence · KRA descriptionvocab breakdown (legacy)
Signals
Post-classification
Captured for admin review
• Generate test benches and test cases. • Perform RTL and gate-level SDF-annotated simulations and debug. • May perform mixed-signal (digital + analog) simulations and debug. • Interact with our appli…
1 POST /skills/extract-from-jd
2 POST /skills/extract-details
3 POST /skills/final-role-output
FPGA / ASIC Engineer
domain · Hardware Engineering CASE DOMAINslug: fpga-asic-engineer · id: 216 · source: db
Domain=Hardware Engineering; The JD centers on RTL, simulation/debug, physical verification, synthesis/timing tools, and chip design/verification for sensor IP, which best fits an FPGA/ASIC Engineer.
Matched skills
Matched dimensions
Matched KRAs
Resolution:
in_db
— role exists in library; skill↔dim and role↔dim links saved when applicable.
Job description
We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. PVT Sensor IP development is a critical offering for process, voltage, temperature and other monitoring IPs within SOC subsystem. Synopsys is the market leader for these IP developments which are integral parts of Silicon lifecycle monitoring. You Are: As a new, exciting and challenging position, we are looking for a talented person that can show a great level of initiative and ability to work in a busy and fast-changing environment. This rewarding role is fundamental to the successful and smooth operation of the engineering teams. You will play a vital role in helping to strengthen and develop forecasting capabilities, based on improved monitoring capacity and forward-looking project schedules. What You’ll Be Doing: • Generate test benches and test cases. • Perform RTL and gate-level SDF-annotated simulations and debug. • May perform mixed-signal (digital + analog) simulations and debug. • Interact with our application engineers and provide guidance to customers. • Participate in the generation of data books, application notes, and white papers. • Contribute to enhance quality assurance methodology by adding more quality checks/gatings. • Perform physical verification and design rule checks to ensure design integrity and manufacturability. The Impact You Will Have: • Enhance the quality and reliability of our PVT Sensor IPs. • Improve project forecasting and monitoring capabilities. • Support the development of innovative solutions for chip design and verification. • Strengthen customer relationships through effective guidance and support. • Contribute to knowledge sharing through documentation and training materials. • Drive continuous improvement in design methodologies and tools. What You’ll Need: • Bachelor’s or master’s degree in electrical engineering or a related field. • 3 to 7+ years of experience in A&MS frontend and backend views & collaterals development flows. • Proficiency in industry-standard EDA tools, such as Cadence Virtuoso or Synopsys Custom Compiler. • Exceptional knowledge of layout design methods, techniques, and methodologies. • Experience with physical verification tools, such as Calibre or Assura. • Understanding of semiconductor process technologies and their impact on layout design. Who You Are: We are seeking someone with excellent problem-solving and systematic skills, who can work effectively in a team-oriented environment. Familiarity with the Synopsys Tool set (such as FC/ICC2, Primetime, Formality, ICV) is essential. Good communication and interpersonal skills are a must. Experience in writing RTL Code, with solid Verilog, PERL, and Python skills, and TCL as an addition, will be highly valuable. Understanding of static timing analysis and synthesis, DFT/ATPG skills, and high-speed communication protocols are added advantages. Previous experience in customer support and/or silicon bring-up will be a plus. The Team You’ll Be A Part Of: You will be part of a dynamic and innovative team focused on developing and verifying high-performance silicon chips. Our team collaborates closely with design engineers and application engineers to ensure the successful integration and functionality of our IPs. We are committed to continuous improvement and knowledge sharing, contributing to the overall success of Synopsys and our customers. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
Skills from this JD
Each row merges API 1 extraction, API 2 library match / v3 orchestration (dimensions + locked dims), and API 3 persistence tags.
Skill enrichment (orchestrator / LLM)
No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).
- Category
- Programming Languages
- Sub-category
- general
- Skill nature
- LANGUAGE
- Volatility
- STABLE
- Typical lifespan
- EVERGREEN
- Version strategy
- UNVERSIONED
Aliases — catalog
- Perl (CANONICAL)
Context tags (catalog)
Stored enrichment (catalog DB)
- Category
- Language
- Sub-category
- Scripting Language
- Vendor
- Perl Foundation
- License
- unknown
- Year introduced
- 1987
- Confidence
- 0.99
- Version strategy
- NOT_APPLICABLE
Maturity reasoning: Perl still appears in some legacy-maintenance JDs, but far fewer than Python/JavaScript; GitHub activity and new-project adoption are much lower, with many orgs having migrated to Python or Ruby.
Skill profile (library / DB)
- Skill nature
- LANGUAGE
- Volatility
- STABLE
- Typical lifespan
- EVERGREEN
- Category id
- 6
- Sub-category id
- 38
- Extractable
- True
- Also category
- False
Dimensions (API 2 worklist)
-
React Frontend Development Catalog dimension db id 96
Library dimension (catalog)
API 3 link attempts (this skill)
| Dimension | Skill↔dim | Role↔dim | Outcome |
|---|---|---|---|
|
React Frontend Development
d_init_01
|
✓ | — | Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role) |
Aliases — catalog
- Python (CANONICAL) primary
- Python 2 (VERSION)
- Python 2.x (VERSION)
- Python 3 (VERSION)
- Python 3.10 (VERSION)
- Python 3.11 (VERSION)
- Python 3.12 (VERSION)
- Python 3.x (VERSION)
- py (VERSION)
- py2 (VERSION)
- py3 (VERSION)
- python 3 (VERSION)
- python 3.x (VERSION)
- python2 (VERSION)
- python3 (VERSION)
- python3.x (VERSION)
Context tags (catalog)
Stored enrichment (catalog DB)
- Category
- Language
- Sub-category
- Programming Language
- Vendor
- PSF
- License
- mit
- Year introduced
- 1991
- Confidence
- 0.99
- Version strategy
- SEPARATE_ENTITY
- Version tag
- 3
Maturity reasoning: Python appears in a very high volume of job descriptions across data, backend, automation, and ML roles, and remains a default hiring-pipeline language on major job boards and tech stacks.
Skill profile (library / DB)
- Skill nature
- LANGUAGE
- Volatility
- STABLE
- Typical lifespan
- EVERGREEN
- Category id
- 6
- Sub-category id
- 96
- Extractable
- True
- Also category
- False
Dimensions (API 2 worklist)
-
Cloud Security Scripting & DSL Languages Catalog dimension db id 248
Library dimension (catalog)
Roles linked in library: Cloud Security Engineer
-
Programming Languages Catalog dimension db id 1
Library dimension (catalog)
Roles linked in library: Backend Developer, Fullstack Developer, Fullstack Developer
-
Programming Languages & DSLs Catalog dimension db id 475
Library dimension (catalog)
Roles linked in library: Engineering Manager
-
Programming Languages and Scripting Catalog dimension db id 59
Library dimension (catalog)
Roles linked in library: Cyber Security Engineer
-
Programming Languages for Data Work Catalog dimension db id 21
Library dimension (catalog)
Roles linked in library: Data Engineer
-
Programming Languages for ML Systems Catalog dimension db id 39
Library dimension (catalog)
Roles linked in library: ML Engineer, MLOps Engineer
-
Programming Languages for XR Catalog dimension db id 97
Library dimension (catalog)
Roles linked in library: AR/VR Engineer
-
Python Programming Catalog dimension db id 290
Library dimension (catalog)
Roles linked in library: Python Backend Developer
API 3 link attempts (this skill)
| Dimension | Skill↔dim | Role↔dim | Outcome |
|---|---|---|---|
|
Cloud Security Scripting & DSL Languages
cloud-security-scripting-dsl-languages
|
✓ | — | Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role) |
|
Programming Languages
programming-languages
|
✓ | — | Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role) |
|
Programming Languages & DSLs
programming-languages-dsls
|
✓ | — | Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role) |
|
Programming Languages and Scripting
programming-languages-and-scripting
|
✓ | — | Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role) |
|
Programming Languages for Data Work
programming-languages-for-data-work
|
✓ | — | Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role) |
|
Programming Languages for ML Systems
programming-languages-for-ml-systems
|
✓ | — | Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role) |
|
Programming Languages for XR
programming-languages-for-xr
|
✓ | — | Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role) |
|
Python Programming
python-programming
|
✓ | — | Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role) |
Skill enrichment (orchestrator / LLM)
No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).
- Category
- Programming Languages
- Sub-category
- general
- Skill nature
- LANGUAGE
- Volatility
- MEDIUM
- Typical lifespan
- MULTI_YEAR
- Version strategy
- UNVERSIONED
Skill enrichment (orchestrator / LLM)
No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).
- Category
- Concepts
- Sub-category
- general
- Skill nature
- CONCEPT
- Volatility
- MEDIUM
- Typical lifespan
- MULTI_YEAR
- Version strategy
- UNVERSIONED
Skill enrichment (orchestrator / LLM)
No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).
- Category
- EDA Tools
- Sub-category
- general
- Skill nature
- TOOL
- Volatility
- MEDIUM
- Typical lifespan
- MULTI_YEAR
- Version strategy
- UNVERSIONED
Skill enrichment (orchestrator / LLM)
No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).
- Category
- EDA Tools
- Sub-category
- general
- Skill nature
- TOOL
- Volatility
- MEDIUM
- Typical lifespan
- MULTI_YEAR
- Version strategy
- UNVERSIONED
Skill enrichment (orchestrator / LLM)
No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).
- Category
- EDA Tools
- Sub-category
- general
- Skill nature
- TOOL
- Volatility
- MEDIUM
- Typical lifespan
- MULTI_YEAR
- Version strategy
- UNVERSIONED
Skill enrichment (orchestrator / LLM)
No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).
- Category
- EDA Tools
- Sub-category
- general
- Skill nature
- TOOL
- Volatility
- MEDIUM
- Typical lifespan
- MULTI_YEAR
- Version strategy
- UNVERSIONED
Skill enrichment (orchestrator / LLM)
No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).
- Category
- EDA Tools
- Sub-category
- general
- Skill nature
- TOOL
- Volatility
- MEDIUM
- Typical lifespan
- MULTI_YEAR
- Version strategy
- UNVERSIONED
Skill enrichment (orchestrator / LLM)
No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).
- Category
- EDA Tools
- Sub-category
- general
- Skill nature
- TOOL
- Volatility
- MEDIUM
- Typical lifespan
- MULTI_YEAR
- Version strategy
- UNVERSIONED
Skill enrichment (orchestrator / LLM)
No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).
- Category
- EDA Tools
- Sub-category
- general
- Skill nature
- PRACTICE
- Volatility
- MEDIUM
- Typical lifespan
- MULTI_YEAR
- Version strategy
- UNVERSIONED
Skill enrichment (orchestrator / LLM)
No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).
- Category
- EDA Tools
- Sub-category
- general
- Skill nature
- PRACTICE
- Volatility
- MEDIUM
- Typical lifespan
- MULTI_YEAR
- Version strategy
- UNVERSIONED
Skill enrichment (orchestrator / LLM)
No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).
- Category
- EDA Tools
- Sub-category
- general
- Skill nature
- CONCEPT
- Volatility
- MEDIUM
- Typical lifespan
- MULTI_YEAR
- Version strategy
- UNVERSIONED
Skill enrichment (orchestrator / LLM)
No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).
- Category
- EDA Tools
- Sub-category
- general
- Skill nature
- TOOL
- Volatility
- MEDIUM
- Typical lifespan
- MULTI_YEAR
- Version strategy
- UNVERSIONED
Skill enrichment (orchestrator / LLM)
No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).
- Category
- EDA Tools
- Sub-category
- general
- Skill nature
- TOOL
- Volatility
- MEDIUM
- Typical lifespan
- MULTI_YEAR
- Version strategy
- UNVERSIONED
Skill enrichment (orchestrator / LLM)
No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).
- Category
- EDA Tools
- Sub-category
- general
- Skill nature
- TOOL
- Volatility
- MEDIUM
- Typical lifespan
- MULTI_YEAR
- Version strategy
- UNVERSIONED
Skill enrichment (orchestrator / LLM)
No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).
- Category
- EDA Tools
- Sub-category
- general
- Skill nature
- TOOL
- Volatility
- MEDIUM
- Typical lifespan
- MULTI_YEAR
- Version strategy
- UNVERSIONED
Skill enrichment (orchestrator / LLM)
No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).
- Category
- EDA Tools
- Sub-category
- general
- Skill nature
- TOOL
- Volatility
- MEDIUM
- Typical lifespan
- MULTI_YEAR
- Version strategy
- UNVERSIONED
Skill enrichment (orchestrator / LLM)
No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).
- Category
- EDA Tools
- Sub-category
- general
- Skill nature
- PRACTICE
- Volatility
- MEDIUM
- Typical lifespan
- MULTI_YEAR
- Version strategy
- UNVERSIONED
Skill enrichment (orchestrator / LLM)
No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).
- Category
- EDA Tools
- Sub-category
- general
- Skill nature
- PRACTICE
- Volatility
- MEDIUM
- Typical lifespan
- MULTI_YEAR
- Version strategy
- UNVERSIONED
Skill enrichment (orchestrator / LLM)
No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).
- Category
- EDA Tools
- Sub-category
- general
- Skill nature
- PRACTICE
- Volatility
- MEDIUM
- Typical lifespan
- MULTI_YEAR
- Version strategy
- UNVERSIONED
Skill enrichment (orchestrator / LLM)
No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).
- Category
- EDA Tools
- Sub-category
- general
- Skill nature
- PRACTICE
- Volatility
- MEDIUM
- Typical lifespan
- MULTI_YEAR
- Version strategy
- UNVERSIONED
Skill enrichment (orchestrator / LLM)
No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).
- Category
- Concepts
- Sub-category
- general
- Skill nature
- CONCEPT
- Volatility
- MEDIUM
- Typical lifespan
- MULTI_YEAR
- Version strategy
- UNVERSIONED
Skill enrichment (orchestrator / LLM)
No Stage 7 enrichment blob on this skill (orchestrator skipped enrichment).
- Category
- Practice
- Sub-category
- general
- Skill nature
- PRACTICE
- Volatility
- MEDIUM
- Typical lifespan
- MULTI_YEAR
- Version strategy
- UNVERSIONED
All API 3 persistence rows
Same grid as the skill-extractor “Persistence items” table: one row per (skill × dimension) work item.
| Skill | Tag | Dimension | Skill↔dim | Role↔dim | Outcome | Notes |
|---|---|---|---|---|---|---|
| Perl | in_db |
React Frontend Development
d_init_01
|
✓ | — | Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role) | |
| Python | in_db |
Cloud Security Scripting & DSL Languages
cloud-security-scripting-dsl-languages
|
✓ | — | Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role) | |
| Python | in_db |
Programming Languages
programming-languages
|
✓ | — | Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role) | |
| Python | in_db |
Programming Languages & DSLs
programming-languages-dsls
|
✓ | — | Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role) | |
| Python | in_db |
Programming Languages and Scripting
programming-languages-and-scripting
|
✓ | — | Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role) | |
| Python | in_db |
Programming Languages for Data Work
programming-languages-for-data-work
|
✓ | — | Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role) | |
| Python | in_db |
Programming Languages for ML Systems
programming-languages-for-ml-systems
|
✓ | — | Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role) | |
| Python | in_db |
Programming Languages for XR
programming-languages-for-xr
|
✓ | — | Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role) | |
| Python | in_db |
Python Programming
python-programming
|
✓ | — | Existing dimension (library) · Role↔dimension skipped (dimension not under chosen role) |
Library artifacts (this run)
| Kind | Detail | DB id |
|---|---|---|
| canonical_skill_proposed | Verilog | type=Programming Languages subtype=general nature=LANGUAGE lifespan=EVERGREEN | |
| canonical_skill_proposed | Tcl | type=Programming Languages subtype=general nature=LANGUAGE lifespan=MULTI_YEAR | |
| canonical_skill_proposed | RTL | type=Concepts subtype=general nature=CONCEPT lifespan=MULTI_YEAR | |
| canonical_skill_proposed | SDF-annotated simulation | type=EDA Tools subtype=general nature=TOOL lifespan=MULTI_YEAR | |
| canonical_skill_proposed | Mixed-signal simulation | type=EDA Tools subtype=general nature=TOOL lifespan=MULTI_YEAR | |
| canonical_skill_proposed | Cadence Virtuoso | type=EDA Tools subtype=general nature=TOOL lifespan=MULTI_YEAR | |
| canonical_skill_proposed | Synopsys Custom Compiler | type=EDA Tools subtype=general nature=TOOL lifespan=MULTI_YEAR | |
| canonical_skill_proposed | Calibre | type=EDA Tools subtype=general nature=TOOL lifespan=MULTI_YEAR | |
| canonical_skill_proposed | Assura | type=EDA Tools subtype=general nature=TOOL lifespan=MULTI_YEAR | |
| canonical_skill_proposed | Physical verification | type=EDA Tools subtype=general nature=PRACTICE lifespan=MULTI_YEAR | |
| canonical_skill_proposed | Design rule checks | type=EDA Tools subtype=general nature=PRACTICE lifespan=MULTI_YEAR | |
| canonical_skill_proposed | EDA tools | type=EDA Tools subtype=general nature=CONCEPT lifespan=MULTI_YEAR | |
| canonical_skill_proposed | Synopsys FC | type=EDA Tools subtype=general nature=TOOL lifespan=MULTI_YEAR | |
| canonical_skill_proposed | Synopsys ICC2 | type=EDA Tools subtype=general nature=TOOL lifespan=MULTI_YEAR | |
| canonical_skill_proposed | PrimeTime | type=EDA Tools subtype=general nature=TOOL lifespan=MULTI_YEAR | |
| canonical_skill_proposed | Formality | type=EDA Tools subtype=general nature=TOOL lifespan=MULTI_YEAR | |
| canonical_skill_proposed | ICV | type=EDA Tools subtype=general nature=TOOL lifespan=MULTI_YEAR | |
| canonical_skill_proposed | Static timing analysis | type=EDA Tools subtype=general nature=PRACTICE lifespan=MULTI_YEAR | |
| canonical_skill_proposed | Synthesis | type=EDA Tools subtype=general nature=PRACTICE lifespan=MULTI_YEAR | |
| canonical_skill_proposed | DFT | type=EDA Tools subtype=general nature=PRACTICE lifespan=MULTI_YEAR | |
| canonical_skill_proposed | ATPG | type=EDA Tools subtype=general nature=PRACTICE lifespan=MULTI_YEAR | |
| canonical_skill_proposed | High-speed communication protocols | type=Concepts subtype=general nature=CONCEPT lifespan=MULTI_YEAR | |
| canonical_skill_proposed | Silicon bring-up | type=Practice subtype=general nature=PRACTICE lifespan=MULTI_YEAR |
nano JD Parser — gpt-4.1-nano click to toggle
Show raw JSON
{
"JD_type": "pass",
"about_company": {
"source_marker": {
"first_5_words": "At Synopsys, we drive the",
"last_5_words": "integral parts of Silicon lifecycle monitoring."
},
"text": "At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. PVT Sensor IP development is a critical offering for process, voltage, temperature and other monitoring IPs within SOC subsystem. Synopsys is the market leader for these IP developments which are integral parts of Silicon lifecycle monitoring.",
"word_count": 84
},
"certifications": [],
"company_name": "Synopsys",
"ctc": null,
"domain": {
"primary": {
"aliases": [
"EDA Tools",
"Chip Design"
],
"domain": "Software \u0026 SaaS Products"
},
"secondary": null
},
"education": [
{
"level": "Bachelor\u0027s",
"qualification": "BTECH/BE/BSC - Electrical Engineering (or related)",
"raw": "Bachelor\u2019s or master\u2019s degree in electrical engineering or a related field.",
"requirement": "required"
}
],
"experience": {
"max": 7,
"min": 3,
"raw": "3 to 7+ years of experience in A\u0026MS frontend and backend views \u0026 collaterals development flows"
},
"job_locations": [],
"role": "PVT Sensor IP Developer",
"role_aliases": [
"IP Developer",
"Silicon IP Engineer",
"Chip Design Engineer"
],
"role_archetype": "Engineering",
"roles_and_responsibilities": [
{
"bullet_count": 7,
"heading": "What You\u2019ll Be Doing",
"heading_was_present": true,
"source_marker": {
"first_5_words": "\u2022 Generate test benches and",
"last_5_words": "design integrity and manufacturability."
},
"text": "\u2022 Generate test benches and test cases.\n\u2022 Perform RTL and gate-level SDF-annotated simulations and debug.\n\u2022 May perform mixed-signal (digital + analog) simulations and debug.\n\u2022 Interact with our application engineers and provide guidance to customers.\n\u2022 Participate in the generation of data books, application notes, and white papers.\n\u2022 Contribute to enhance quality assurance methodology by adding more quality checks/gatings.\n\u2022 Perform physical verification and design rule checks to ensure design integrity and manufacturability.",
"word_count": 83
},
{
"bullet_count": 6,
"heading": "The Impact You Will Have",
"heading_was_present": true,
"source_marker": {
"first_5_words": "\u2022 Enhance the quality and",
"last_5_words": "methodologies and tools."
},
"text": "\u2022 Enhance the quality and reliability of our PVT Sensor IPs.\n\u2022 Improve project forecasting and monitoring capabilities.\n\u2022 Support the development of innovative solutions for chip design and verification.\n\u2022 Strengthen customer relationships through effective guidance and support.\n\u2022 Contribute to knowledge sharing through documentation and training materials.\n\u2022 Drive continuous improvement in design methodologies and tools.",
"word_count": 66
},
{
"bullet_count": 6,
"heading": "What You\u2019ll Need",
"heading_was_present": true,
"source_marker": {
"first_5_words": "\u2022 Bachelor\u2019s or master\u2019s degree",
"last_5_words": "impact on layout design."
},
"text": "\u2022 Bachelor\u2019s or master\u2019s degree in electrical engineering or a related field.\n\u2022 3 to 7+ years of experience in A\u0026MS frontend and backend views \u0026 collaterals development flows.\n\u2022 Proficiency in industry-standard EDA tools, such as Cadence Virtuoso or Synopsys Custom Compiler.\n\u2022 Exceptional knowledge of layout design methods, techniques, and methodologies.\n\u2022 Experience with physical verification tools, such as Calibre or Assura.\n\u2022 Understanding of semiconductor process technologies and their impact on layout design.",
"word_count": 83
},
{
"bullet_count": 0,
"heading": "Who You Are",
"heading_was_present": true,
"source_marker": {
"first_5_words": "We are seeking someone with",
"last_5_words": "support and/or silicon bring-up will"
},
"text": "We are seeking someone with excellent problem-solving and systematic skills, who can work effectively in a team-oriented environment. Familiarity with the Synopsys Tool set (such as FC/ICC2, Primetime, Formality, ICV) is essential. Good communication and interpersonal skills are a must. Experience in writing RTL Code, with solid Verilog, PERL, and Python skills, and TCL as an addition, will be highly valuable. Understanding of static timing analysis and synthesis, DFT/ATPG skills, and high-speed communication protocols are added advantages. Previous experience in customer support and/or silicon bring-up will be a plus.",
"word_count": 98
}
],
"urls": []
}
API 1 — extract-from-jd click to toggle
{
"final_skills": [
{
"is_primary": true,
"skill_name": "Verilog"
},
{
"is_primary": true,
"skill_name": "Perl"
},
{
"is_primary": true,
"skill_name": "Python"
},
{
"is_primary": false,
"skill_name": "Tcl"
},
{
"is_primary": true,
"skill_name": "RTL"
},
{
"is_primary": true,
"skill_name": "SDF-annotated simulation"
},
{
"is_primary": false,
"skill_name": "Mixed-signal simulation"
},
{
"is_primary": true,
"skill_name": "Cadence Virtuoso"
},
{
"is_primary": true,
"skill_name": "Synopsys Custom Compiler"
},
{
"is_primary": true,
"skill_name": "Calibre"
},
{
"is_primary": true,
"skill_name": "Assura"
},
{
"is_primary": true,
"skill_name": "Physical verification"
},
{
"is_primary": true,
"skill_name": "Design rule checks"
},
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"derived": {
"category": "EDA Tools",
"skill_nature": "TOOL",
"sub_category": "general",
"typical_lifespan": "MULTI_YEAR",
"version_strategy": "UNVERSIONED",
"volatility": "MEDIUM"
},
"enrichment": null,
"keep_log": [],
"locked_dimensions": [],
"merge_log": [],
"placed": null,
"relationships": null,
"skill_id": "assura",
"split_log": [],
"typed": null,
"warnings": []
},
"source_tag": "llm",
"was_in_llm_skills": true
},
{
"aliases_in_db": [],
"canonical": null,
"dimensions": [],
"input_skill": "Physical verification",
"matched_via": null,
"new_alias_persisted": false,
"new_alias_text": null,
"new_skill_meta": {
"derived": {
"category": "EDA Tools",
"skill_nature": "PRACTICE",
"sub_category": "general",
"typical_lifespan": "MULTI_YEAR",
"version_strategy": "UNVERSIONED",
"volatility": "MEDIUM"
},
"enrichment": null,
"keep_log": [],
"locked_dimensions": [],
"merge_log": [],
"placed": null,
"relationships": null,
"skill_id": "physical-verification",
"split_log": [],
"typed": null,
"warnings": []
},
"source_tag": "llm",
"was_in_llm_skills": true
},
{
"aliases_in_db": [],
"canonical": null,
"dimensions": [],
"input_skill": "Design rule checks",
"matched_via": null,
"new_alias_persisted": false,
"new_alias_text": null,
"new_skill_meta": {
"derived": {
"category": "EDA Tools",
"skill_nature": "PRACTICE",
"sub_category": "general",
"typical_lifespan": "MULTI_YEAR",
"version_strategy": "UNVERSIONED",
"volatility": "MEDIUM"
},
"enrichment": null,
"keep_log": [],
"locked_dimensions": [],
"merge_log": [],
"placed": null,
"relationships": null,
"skill_id": "design-rule-checks",
"split_log": [],
"typed": null,
"warnings": []
},
"source_tag": "llm",
"was_in_llm_skills": true
},
{
"aliases_in_db": [],
"canonical": null,
"dimensions": [],
"input_skill": "EDA tools",
"matched_via": null,
"new_alias_persisted": false,
"new_alias_text": null,
"new_skill_meta": {
"derived": {
"category": "EDA Tools",
"skill_nature": "CONCEPT",
"sub_category": "general",
"typical_lifespan": "MULTI_YEAR",
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"volatility": "MEDIUM"
},
"enrichment": null,
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"merge_log": [],
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"relationships": null,
"skill_id": "eda-tools",
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},
"source_tag": "llm",
"was_in_llm_skills": true
},
{
"aliases_in_db": [],
"canonical": null,
"dimensions": [],
"input_skill": "Synopsys FC",
"matched_via": null,
"new_alias_persisted": false,
"new_alias_text": null,
"new_skill_meta": {
"derived": {
"category": "EDA Tools",
"skill_nature": "TOOL",
"sub_category": "general",
"typical_lifespan": "MULTI_YEAR",
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"volatility": "MEDIUM"
},
"enrichment": null,
"keep_log": [],
"locked_dimensions": [],
"merge_log": [],
"placed": null,
"relationships": null,
"skill_id": "synopsys-fc",
"split_log": [],
"typed": null,
"warnings": []
},
"source_tag": "llm",
"was_in_llm_skills": true
},
{
"aliases_in_db": [],
"canonical": null,
"dimensions": [],
"input_skill": "Synopsys ICC2",
"matched_via": null,
"new_alias_persisted": false,
"new_alias_text": null,
"new_skill_meta": {
"derived": {
"category": "EDA Tools",
"skill_nature": "TOOL",
"sub_category": "general",
"typical_lifespan": "MULTI_YEAR",
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"volatility": "MEDIUM"
},
"enrichment": null,
"keep_log": [],
"locked_dimensions": [],
"merge_log": [],
"placed": null,
"relationships": null,
"skill_id": "synopsys-icc2",
"split_log": [],
"typed": null,
"warnings": []
},
"source_tag": "llm",
"was_in_llm_skills": true
},
{
"aliases_in_db": [],
"canonical": null,
"dimensions": [],
"input_skill": "PrimeTime",
"matched_via": null,
"new_alias_persisted": false,
"new_alias_text": null,
"new_skill_meta": {
"derived": {
"category": "EDA Tools",
"skill_nature": "TOOL",
"sub_category": "general",
"typical_lifespan": "MULTI_YEAR",
"version_strategy": "UNVERSIONED",
"volatility": "MEDIUM"
},
"enrichment": null,
"keep_log": [],
"locked_dimensions": [],
"merge_log": [],
"placed": null,
"relationships": null,
"skill_id": "primetime",
"split_log": [],
"typed": null,
"warnings": []
},
"source_tag": "llm",
"was_in_llm_skills": true
},
{
"aliases_in_db": [],
"canonical": null,
"dimensions": [],
"input_skill": "Formality",
"matched_via": null,
"new_alias_persisted": false,
"new_alias_text": null,
"new_skill_meta": {
"derived": {
"category": "EDA Tools",
"skill_nature": "TOOL",
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"typical_lifespan": "MULTI_YEAR",
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},
"enrichment": null,
"keep_log": [],
"locked_dimensions": [],
"merge_log": [],
"placed": null,
"relationships": null,
"skill_id": "formality",
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"typed": null,
"warnings": []
},
"source_tag": "llm",
"was_in_llm_skills": true
},
{
"aliases_in_db": [],
"canonical": null,
"dimensions": [],
"input_skill": "ICV",
"matched_via": null,
"new_alias_persisted": false,
"new_alias_text": null,
"new_skill_meta": {
"derived": {
"category": "EDA Tools",
"skill_nature": "TOOL",
"sub_category": "general",
"typical_lifespan": "MULTI_YEAR",
"version_strategy": "UNVERSIONED",
"volatility": "MEDIUM"
},
"enrichment": null,
"keep_log": [],
"locked_dimensions": [],
"merge_log": [],
"placed": null,
"relationships": null,
"skill_id": "icv",
"split_log": [],
"typed": null,
"warnings": []
},
"source_tag": "llm",
"was_in_llm_skills": true
},
{
"aliases_in_db": [],
"canonical": null,
"dimensions": [],
"input_skill": "Static timing analysis",
"matched_via": null,
"new_alias_persisted": false,
"new_alias_text": null,
"new_skill_meta": {
"derived": {
"category": "EDA Tools",
"skill_nature": "PRACTICE",
"sub_category": "general",
"typical_lifespan": "MULTI_YEAR",
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"volatility": "MEDIUM"
},
"enrichment": null,
"keep_log": [],
"locked_dimensions": [],
"merge_log": [],
"placed": null,
"relationships": null,
"skill_id": "static-timing-analysis",
"split_log": [],
"typed": null,
"warnings": []
},
"source_tag": "llm",
"was_in_llm_skills": true
},
{
"aliases_in_db": [],
"canonical": null,
"dimensions": [],
"input_skill": "Synthesis",
"matched_via": null,
"new_alias_persisted": false,
"new_alias_text": null,
"new_skill_meta": {
"derived": {
"category": "EDA Tools",
"skill_nature": "PRACTICE",
"sub_category": "general",
"typical_lifespan": "MULTI_YEAR",
"version_strategy": "UNVERSIONED",
"volatility": "MEDIUM"
},
"enrichment": null,
"keep_log": [],
"locked_dimensions": [],
"merge_log": [],
"placed": null,
"relationships": null,
"skill_id": "synthesis",
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"typed": null,
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},
"source_tag": "llm",
"was_in_llm_skills": true
},
{
"aliases_in_db": [],
"canonical": null,
"dimensions": [],
"input_skill": "DFT",
"matched_via": null,
"new_alias_persisted": false,
"new_alias_text": null,
"new_skill_meta": {
"derived": {
"category": "EDA Tools",
"skill_nature": "PRACTICE",
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"typical_lifespan": "MULTI_YEAR",
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"volatility": "MEDIUM"
},
"enrichment": null,
"keep_log": [],
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"merge_log": [],
"placed": null,
"relationships": null,
"skill_id": "dft",
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"typed": null,
"warnings": []
},
"source_tag": "llm",
"was_in_llm_skills": true
},
{
"aliases_in_db": [],
"canonical": null,
"dimensions": [],
"input_skill": "ATPG",
"matched_via": null,
"new_alias_persisted": false,
"new_alias_text": null,
"new_skill_meta": {
"derived": {
"category": "EDA Tools",
"skill_nature": "PRACTICE",
"sub_category": "general",
"typical_lifespan": "MULTI_YEAR",
"version_strategy": "UNVERSIONED",
"volatility": "MEDIUM"
},
"enrichment": null,
"keep_log": [],
"locked_dimensions": [],
"merge_log": [],
"placed": null,
"relationships": null,
"skill_id": "atpg",
"split_log": [],
"typed": null,
"warnings": []
},
"source_tag": "llm",
"was_in_llm_skills": true
},
{
"aliases_in_db": [],
"canonical": null,
"dimensions": [],
"input_skill": "High-speed communication protocols",
"matched_via": null,
"new_alias_persisted": false,
"new_alias_text": null,
"new_skill_meta": {
"derived": {
"category": "Concepts",
"skill_nature": "CONCEPT",
"sub_category": "general",
"typical_lifespan": "MULTI_YEAR",
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"volatility": "MEDIUM"
},
"enrichment": null,
"keep_log": [],
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"merge_log": [],
"placed": null,
"relationships": null,
"skill_id": "high-speed-communication-protocols",
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"typed": null,
"warnings": []
},
"source_tag": "llm",
"was_in_llm_skills": true
},
{
"aliases_in_db": [],
"canonical": null,
"dimensions": [],
"input_skill": "Silicon bring-up",
"matched_via": null,
"new_alias_persisted": false,
"new_alias_text": null,
"new_skill_meta": {
"derived": {
"category": "Practice",
"skill_nature": "PRACTICE",
"sub_category": "general",
"typical_lifespan": "MULTI_YEAR",
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"volatility": "MEDIUM"
},
"enrichment": null,
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"merge_log": [],
"placed": null,
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"skill_id": "silicon-bring-up",
"split_log": [],
"typed": null,
"warnings": []
},
"source_tag": "llm",
"was_in_llm_skills": true
}
],
"unmatched_skills": [
"Verilog",
"Tcl",
"RTL",
"SDF-annotated simulation",
"Mixed-signal simulation",
"Cadence Virtuoso",
"Synopsys Custom Compiler",
"Calibre",
"Assura",
"Physical verification",
"Design rule checks",
"EDA tools",
"Synopsys FC",
"Synopsys ICC2",
"PrimeTime",
"Formality",
"ICV",
"Static timing analysis",
"Synthesis",
"DFT",
"ATPG",
"High-speed communication protocols",
"Silicon bring-up"
]
}
API 3 — final-role-output
{
"chosen_role": {
"display_name": "FPGA / ASIC Engineer",
"id": 216,
"rationale": "Domain=Hardware Engineering; The JD centers on RTL, simulation/debug, physical verification, synthesis/timing tools, and chip design/verification for sensor IP, which best fits an FPGA/ASIC Engineer.",
"role_archetype": null,
"slug": "fpga-asic-engineer",
"source": "db"
},
"chosen_role_resolution": "in_db",
"final_input_skills": [
{
"skill": "Verilog",
"tag": "new"
},
{
"skill": "Perl",
"tag": "in_db"
},
{
"skill": "Python",
"tag": "in_db"
},
{
"skill": "Tcl",
"tag": "new"
},
{
"skill": "RTL",
"tag": "new"
},
{
"skill": "SDF-annotated simulation",
"tag": "new"
},
{
"skill": "Mixed-signal simulation",
"tag": "new"
},
{
"skill": "Cadence Virtuoso",
"tag": "new"
},
{
"skill": "Synopsys Custom Compiler",
"tag": "new"
},
{
"skill": "Calibre",
"tag": "new"
},
{
"skill": "Assura",
"tag": "new"
},
{
"skill": "Physical verification",
"tag": "new"
},
{
"skill": "Design rule checks",
"tag": "new"
},
{
"skill": "EDA tools",
"tag": "new"
},
{
"skill": "Synopsys FC",
"tag": "new"
},
{
"skill": "Synopsys ICC2",
"tag": "new"
},
{
"skill": "PrimeTime",
"tag": "new"
},
{
"skill": "Formality",
"tag": "new"
},
{
"skill": "ICV",
"tag": "new"
},
{
"skill": "Static timing analysis",
"tag": "new"
},
{
"skill": "Synthesis",
"tag": "new"
},
{
"skill": "DFT",
"tag": "new"
},
{
"skill": "ATPG",
"tag": "new"
},
{
"skill": "High-speed communication protocols",
"tag": "new"
},
{
"skill": "Silicon bring-up",
"tag": "new"
}
],
"llm_cost_api1_usd": null,
"llm_cost_api2_usd": null,
"llm_cost_api3_usd": null,
"llm_cost_total_usd": null,
"persistence": {
"items": [
{
"chosen_role_id": 216,
"dimension": {
"difficulty_hint": "well_known",
"display_name": "React Frontend Development",
"id": 96,
"rationale": "Building interactive web user interfaces with React.js, including component composition, state management, hooks, and rendering patterns. React.js belongs here because it is a core library for client-side UI development in modern web applications.",
"slug": "d_init_01",
"source": "db"
},
"dimension_id": 96,
"input_skill": "Perl",
"llm_role": null,
"matched_chosen_role": false,
"outcome_line": "Existing dimension (library) \u00b7 Role\u2194dimension skipped (dimension not under chosen role)",
"role_dimension_saved": false,
"roles_from_db": [],
"skill_dimension_saved": true,
"skill_id": 1001,
"skill_tag": "in_db",
"skipped_reason": null
},
{
"chosen_role_id": 216,
"dimension": {
"difficulty_hint": "well_known",
"display_name": "Cloud Security Scripting \u0026 DSL Languages",
"id": 248,
"rationale": "Proficiency in programming and domain-specific languages used to automate and script cloud security controls.",
"slug": "cloud-security-scripting-dsl-languages",
"source": "db"
},
"dimension_id": 248,
"input_skill": "Python",
"llm_role": null,
"matched_chosen_role": false,
"outcome_line": "Existing dimension (library) \u00b7 Role\u2194dimension skipped (dimension not under chosen role)",
"role_dimension_saved": false,
"roles_from_db": [
{
"display_name": "Cloud Security Engineer",
"id": 23,
"rationale": null,
"role_archetype": null,
"slug": "cloud-security-engineer",
"source": "db"
}
],
"skill_dimension_saved": true,
"skill_id": 5,
"skill_tag": "in_db",
"skipped_reason": null
},
{
"chosen_role_id": 216,
"dimension": {
"difficulty_hint": "well_known",
"display_name": "Programming Languages",
"id": 1,
"rationale": "Primary implementation languages used to build client and server feature code. Full stack engineers need enough fluency to move across layers and implement product behavior end to end.",
"slug": "programming-languages",
"source": "db"
},
"dimension_id": 1,
"input_skill": "Python",
"llm_role": null,
"matched_chosen_role": false,
"outcome_line": "Existing dimension (library) \u00b7 Role\u2194dimension skipped (dimension not under chosen role)",
"role_dimension_saved": false,
"roles_from_db": [
{
"display_name": "Backend Developer",
"id": 1,
"rationale": null,
"role_archetype": "A Backend Engineer designs, builds, and maintains the server-side logic and data handling that power applications and services. They focus on implementing reliable business functionality, integrating with other systems, and ensuring the backend is scalable, maintainable, and observable.",
"slug": "backend-engineer",
"source": "db"
},
{
"display_name": "Fullstack Developer",
"id": 15,
"rationale": null,
"role_archetype": null,
"slug": "full-stack-engineer",
"source": "db"
},
{
"display_name": "Fullstack Developer",
"id": 435,
"rationale": null,
"role_archetype": "Engineering",
"slug": "fullstack-developer",
"source": "db"
}
],
"skill_dimension_saved": true,
"skill_id": 5,
"skill_tag": "in_db",
"skipped_reason": null
},
{
"chosen_role_id": 216,
"dimension": {
"difficulty_hint": "well_known",
"display_name": "Programming Languages \u0026 DSLs",
"id": 475,
"rationale": "Oversee and guide the selection and effective use of programming and domain\u2010specific languages in software projects.",
"slug": "programming-languages-dsls",
"source": "db"
},
"dimension_id": 475,
"input_skill": "Python",
"llm_role": null,
"matched_chosen_role": false,
"outcome_line": "Existing dimension (library) \u00b7 Role\u2194dimension skipped (dimension not under chosen role)",
"role_dimension_saved": false,
"roles_from_db": [
{
"display_name": "Engineering Manager",
"id": 121,
"rationale": null,
"role_archetype": null,
"slug": "engineering-manager",
"source": "db"
}
],
"skill_dimension_saved": true,
"skill_id": 5,
"skill_tag": "in_db",
"skipped_reason": null
},
{
"chosen_role_id": 216,
"dimension": {
"difficulty_hint": "well_known",
"display_name": "Programming Languages and Scripting",
"id": 59,
"rationale": "Languages used to write security automation, analysis scripts, detection logic, and remediation helpers. This is the primary implementation surface for a cybersecurity engineer across tooling and response workflows.",
"slug": "programming-languages-and-scripting",
"source": "db"
},
"dimension_id": 59,
"input_skill": "Python",
"llm_role": null,
"matched_chosen_role": false,
"outcome_line": "Existing dimension (library) \u00b7 Role\u2194dimension skipped (dimension not under chosen role)",
"role_dimension_saved": false,
"roles_from_db": [
{
"display_name": "Cyber Security Engineer",
"id": 5,
"rationale": null,
"role_archetype": null,
"slug": "cybersecurity-engineer",
"source": "db"
}
],
"skill_dimension_saved": true,
"skill_id": 5,
"skill_tag": "in_db",
"skipped_reason": null
},
{
"chosen_role_id": 216,
"dimension": {
"difficulty_hint": "well_known",
"display_name": "Programming Languages for Data Work",
"id": 21,
"rationale": "Languages used to implement data pipelines, transformations, and operational glue. This is the primary coding surface for building ingestion, enrichment, and automation logic in data engineering.",
"slug": "programming-languages-for-data-work",
"source": "db"
},
"dimension_id": 21,
"input_skill": "Python",
"llm_role": null,
"matched_chosen_role": false,
"outcome_line": "Existing dimension (library) \u00b7 Role\u2194dimension skipped (dimension not under chosen role)",
"role_dimension_saved": false,
"roles_from_db": [
{
"display_name": "Data Engineer",
"id": 2,
"rationale": null,
"role_archetype": null,
"slug": "data-engineer",
"source": "db"
}
],
"skill_dimension_saved": true,
"skill_id": 5,
"skill_tag": "in_db",
"skipped_reason": null
},
{
"chosen_role_id": 216,
"dimension": {
"difficulty_hint": "well_known",
"display_name": "Programming Languages for ML Systems",
"id": 39,
"rationale": "Languages used to build training code, inference services, evaluation jobs, and ML glue code. This is the primary implementation surface for ML engineers across experimentation and productionization.",
"slug": "programming-languages-for-ml-systems",
"source": "db"
},
"dimension_id": 39,
"input_skill": "Python",
"llm_role": null,
"matched_chosen_role": false,
"outcome_line": "Existing dimension (library) \u00b7 Role\u2194dimension skipped (dimension not under chosen role)",
"role_dimension_saved": false,
"roles_from_db": [
{
"display_name": "ML Engineer",
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"role_archetype": null,
"slug": "ml-engineer",
"source": "db"
},
{
"display_name": "MLOps Engineer",
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"role_archetype": null,
"slug": "ml-ops-engineer",
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}
],
"skill_dimension_saved": true,
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"skill_tag": "in_db",
"skipped_reason": null
},
{
"chosen_role_id": 216,
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"difficulty_hint": "well_known",
"display_name": "Programming Languages for XR",
"id": 97,
"rationale": "Primary implementation languages used to build immersive client features, interaction logic, and device-specific runtime behavior. This is the core coding surface for AR/VR experiences.",
"slug": "programming-languages-for-xr",
"source": "db"
},
"dimension_id": 97,
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"llm_role": null,
"matched_chosen_role": false,
"outcome_line": "Existing dimension (library) \u00b7 Role\u2194dimension skipped (dimension not under chosen role)",
"role_dimension_saved": false,
"roles_from_db": [
{
"display_name": "AR/VR Engineer",
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"role_archetype": null,
"slug": "ar-vr-engineer",
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}
],
"skill_dimension_saved": true,
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"skipped_reason": null
},
{
"chosen_role_id": 216,
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"display_name": "Python Programming",
"id": 290,
"rationale": "Core Python language skills used to implement backend business logic, request handlers, integrations, and service internals. This is the primary coding surface for the role.",
"slug": "python-programming",
"source": "db"
},
"dimension_id": 290,
"input_skill": "Python",
"llm_role": null,
"matched_chosen_role": false,
"outcome_line": "Existing dimension (library) \u00b7 Role\u2194dimension skipped (dimension not under chosen role)",
"role_dimension_saved": false,
"roles_from_db": [
{
"display_name": "Python Backend Developer",
"id": 80,
"rationale": null,
"role_archetype": "Engineering",
"slug": "python-backend-developer",
"source": "db"
}
],
"skill_dimension_saved": true,
"skill_id": 5,
"skill_tag": "in_db",
"skipped_reason": null
}
],
"new_skills_created": 0,
"role_dimension_saved": 0,
"skill_dimension_saved": 0,
"skipped": 0
},
"planner_output": null,
"run_id": "7252e427-a97a-432b-967e-3f3f869cd9a0"
}
LLM Calls
Every model call made for this run, in pipeline order. Click a card to see the model's response.